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| author | Ard Biesheuvel <ardb@kernel.org> | 2022-06-24 17:06:34 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-06-24 17:18:09 +0100 |
| commit | ebd9aea1f27ef27ed8581c16a96352b3cce89f39 (patch) | |
| tree | 71912b608eb67a88f418b02f4d18af8c2c617b39 /arch/arm64/include/asm/mmu_context.h | |
| parent | e8d13cced5c5038cc93de9561cf2cb4f22205061 (diff) | |
| download | linux-ebd9aea1f27ef27ed8581c16a96352b3cce89f39.tar.bz2 | |
arm64: head: drop idmap_ptrs_per_pgd
The assignment of idmap_ptrs_per_pgd lacks any cache invalidation, even
though it is updated with the MMU and caches disabled. However, we never
bother to read the value again except in the very next instruction, and
so we can just drop the variable entirely.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Link: https://lore.kernel.org/r/20220624150651.1358849-5-ardb@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include/asm/mmu_context.h')
| -rw-r--r-- | arch/arm64/include/asm/mmu_context.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 6ac0086ebb1a..7b387c3b312a 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -61,7 +61,6 @@ static inline void cpu_switch_mm(pgd_t *pgd, struct mm_struct *mm) * physical memory, in which case it will be smaller. */ extern int idmap_t0sz; -extern u64 idmap_ptrs_per_pgd; /* * Ensure TCR.T0SZ is set to the provided value. |