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| author | Vincenzo Frascino <vincenzo.frascino@arm.com> | 2019-09-06 10:58:01 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2020-09-03 17:26:32 +0100 |
| commit | 3b714d24ef173f81c78af16f73dcc9b40428c803 (patch) | |
| tree | 355afb2207944284b1e3d2a14a89083f57ddef98 /arch/arm64/include/asm/hwcap.h | |
| parent | 0178dc7613684561ff3bb1625cd5504f1e7fbe3d (diff) | |
| download | linux-3b714d24ef173f81c78af16f73dcc9b40428c803.tar.bz2 | |
arm64: mte: CPU feature detection and initial sysreg configuration
Add the cpufeature and hwcap entries to detect the presence of MTE. Any
secondary CPU not supporting the feature, if detected on the boot CPU,
will be parked.
Add the minimum SCTLR_EL1 and HCR_EL2 bits for enabling MTE. The Normal
Tagged memory type is configured in MAIR_EL1 before the MMU is enabled
in order to avoid disrupting other CPUs in the CnP domain.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Co-developed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/hwcap.h')
| -rw-r--r-- | arch/arm64/include/asm/hwcap.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index 22f73fe09030..0d4a6741b6a5 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -95,7 +95,7 @@ #define KERNEL_HWCAP_DGH __khwcap2_feature(DGH) #define KERNEL_HWCAP_RNG __khwcap2_feature(RNG) #define KERNEL_HWCAP_BTI __khwcap2_feature(BTI) -/* reserved for KERNEL_HWCAP_MTE __khwcap2_feature(MTE) */ +#define KERNEL_HWCAP_MTE __khwcap2_feature(MTE) /* * This yields a mask that user programs can use to figure out what |