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authorCatalin Marinas <catalin.marinas@arm.com>2022-05-20 18:51:54 +0100
committerCatalin Marinas <catalin.marinas@arm.com>2022-05-20 18:51:54 +0100
commit0616ea3f1b93a99264d84f3d002ae117f6526b62 (patch)
treef805067a257b1e467ffe38bb43b7f8c148a19101 /arch/arm64/include/asm/esr.h
parentd6fc5db0f82828c74742319cb6c988c4a8aac535 (diff)
parent18f3976fdb5da2ba9572845e6f7dfb58652871ea (diff)
downloadlinux-0616ea3f1b93a99264d84f3d002ae117f6526b62.tar.bz2
Merge branch 'for-next/esr-elx-64-bit' into for-next/core
* for-next/esr-elx-64-bit: : Treat ESR_ELx as a 64-bit register. KVM: arm64: uapi: Add kvm_debug_exit_arch.hsr_high KVM: arm64: Treat ESR_EL2 as a 64-bit register arm64: Treat ESR_ELx as a 64-bit register arm64: compat: Do not treat syscall number as ESR_ELx for a bad syscall arm64: Make ESR_ELx_xVC_IMM_MASK compatible with assembly
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
-rw-r--r--arch/arm64/include/asm/esr.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h
index 0467837fd66b..8f236de7359c 100644
--- a/arch/arm64/include/asm/esr.h
+++ b/arch/arm64/include/asm/esr.h
@@ -138,7 +138,7 @@
#define ESR_ELx_WFx_ISS_TI (UL(1) << 0)
#define ESR_ELx_WFx_ISS_WFI (UL(0) << 0)
#define ESR_ELx_WFx_ISS_WFE (UL(1) << 0)
-#define ESR_ELx_xVC_IMM_MASK ((1UL << 16) - 1)
+#define ESR_ELx_xVC_IMM_MASK ((UL(1) << 16) - 1)
#define DISR_EL1_IDS (UL(1) << 24)
/*
@@ -341,14 +341,14 @@
#ifndef __ASSEMBLY__
#include <asm/types.h>
-static inline bool esr_is_data_abort(u32 esr)
+static inline bool esr_is_data_abort(unsigned long esr)
{
- const u32 ec = ESR_ELx_EC(esr);
+ const unsigned long ec = ESR_ELx_EC(esr);
return ec == ESR_ELx_EC_DABT_LOW || ec == ESR_ELx_EC_DABT_CUR;
}
-const char *esr_get_class_string(u32 esr);
+const char *esr_get_class_string(unsigned long esr);
#endif /* __ASSEMBLY */
#endif /* __ASM_ESR_H */