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authorBiju Das <biju.das@bp.renesas.com>2019-09-30 09:18:45 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-10-10 16:22:07 +0200
commitbbbb919f3286f3bddfe9b23feaf184860d11d0ac (patch)
tree03347733f602d3ad7a2ef9bebf29d683cad3cf24 /arch/arm64/boot/dts
parent83e7620a0417cd2716bda35bb89549ffb8692ea0 (diff)
downloadlinux-bbbb919f3286f3bddfe9b23feaf184860d11d0ac.tar.bz2
arm64: dts: renesas: r8a774b1: Add GPIO device nodes
Add GPIO device nodes to the DT of the r8a774b1 SoC. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Link: https://lore.kernel.org/r/1569831527-1250-4-git-send-email-biju.das@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/renesas/r8a774b1.dtsi64
1 files changed, 56 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
index e6c8cca6b679..641af27bc123 100644
--- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi
@@ -132,75 +132,123 @@
};
gpio0: gpio@e6050000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 0 16>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 32 29>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 64 15>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
gpio3: gpio@e6053000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 96 16>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
gpio4: gpio@e6054000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 128 18>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
gpio5: gpio@e6055000 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 160 26>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
gpio6: gpio@e6055400 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 192 32>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
};
gpio7: gpio@e6055800 {
+ compatible = "renesas,gpio-r8a774b1",
+ "renesas,rcar-gen3-gpio";
reg = <0 0xe6055800 0 0x50>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
+ gpio-ranges = <&pfc 0 224 4>;
#interrupt-cells = <2>;
interrupt-controller;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 905>;
+ power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
+ resets = <&cpg 905>;
};
pfc: pin-controller@e6060000 {