diff options
author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-05 18:05:06 +0200 |
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committer | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-07 08:56:17 +0200 |
commit | 5621638cf014ff3b0afc4ac581df02772013e6df (patch) | |
tree | b62c1221ce5495db3b8940a2a5b84761f252ab79 /arch/arm64/boot/dts | |
parent | 3d501682329a433843d26116fe13a4bbad963104 (diff) | |
download | linux-5621638cf014ff3b0afc4ac581df02772013e6df.tar.bz2 |
arm64: dts: fsd: use local header for pinctrl register values
The DTS uses hardware register values directly in pin controller pin
configuration. These are not some IDs or other abstraction layer but
raw numbers used in the registers.
These numbers were previously put in the bindings header to avoid code
duplication and to provide some context meaning (name), but they do not
fit the purpose of bindings. It is also quite confusing to use
constants prefixed with Exynos for other SoC, because there is actually
nothing here in common, except the actual value.
Store the constants in a header next to DTS and use them instead of
bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220605160508.134075-7-krzysztof.kozlowski@linaro.org
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r-- | arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi | 104 | ||||
-rw-r--r-- | arch/arm64/boot/dts/tesla/fsd-pinctrl.h | 33 |
2 files changed, 85 insertions, 52 deletions
diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi index 387a41e251d5..d0abb9aa0e9e 100644 --- a/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.dtsi @@ -8,7 +8,7 @@ * https://www.tesla.com */ -#include <dt-bindings/pinctrl/samsung.h> +#include "fsd-pinctrl.h" &pinctrl_fsys0 { gpf0: gpf0-gpio-bank { @@ -53,16 +53,16 @@ ufs_rst_n: ufs-rst-n-pins { samsung,pins = "gpf5-0"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV2>; }; ufs_refclk_out: ufs-refclk-out-pins { samsung,pins = "gpf5-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV2>; }; }; @@ -237,107 +237,107 @@ pwm0_out: pwm0-out-pins { samsung,pins = "gpb6-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV2>; }; pwm1_out: pwm1-out-pins { samsung,pins = "gpb6-5"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV2>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV2>; }; hs_i2c0_bus: hs-i2c0-bus-pins { samsung,pins = "gpb0-0", "gpb0-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c1_bus: hs-i2c1-bus-pins { samsung,pins = "gpb0-2", "gpb0-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c2_bus: hs-i2c2-bus-pins { samsung,pins = "gpb0-4", "gpb0-5"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c3_bus: hs-i2c3-bus-pins { samsung,pins = "gpb0-6", "gpb0-7"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c4_bus: hs-i2c4-bus-pins { samsung,pins = "gpb1-0", "gpb1-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c5_bus: hs-i2c5-bus-pins { samsung,pins = "gpb1-2", "gpb1-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c6_bus: hs-i2c6-bus-pins { samsung,pins = "gpb1-4", "gpb1-5"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; hs_i2c7_bus: hs-i2c7-bus-pins { samsung,pins = "gpb1-6", "gpb1-7"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; uart0_data: uart0-data-pins { samsung,pins = "gpb7-0", "gpb7-1"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; uart1_data: uart1-data-pins { samsung,pins = "gpb7-4", "gpb7-5"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_NONE>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; spi0_bus: spi0-bus-pins { samsung,pins = "gpb4-0", "gpb4-2", "gpb4-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; spi1_bus: spi1-bus-pins { samsung,pins = "gpb4-4", "gpb4-6", "gpb4-7"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; spi2_bus: spi2-bus-pins { samsung,pins = "gpb5-0", "gpb5-2", "gpb5-3"; - samsung,pin-function = <EXYNOS_PIN_FUNC_2>; - samsung,pin-pud = <EXYNOS_PIN_PULL_UP>; - samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>; + samsung,pin-function = <FSD_PIN_FUNC_2>; + samsung,pin-pud = <FSD_PIN_PULL_UP>; + samsung,pin-drv = <FSD_PIN_DRV_LV1>; }; }; diff --git a/arch/arm64/boot/dts/tesla/fsd-pinctrl.h b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h new file mode 100644 index 000000000000..6ffbda362493 --- /dev/null +++ b/arch/arm64/boot/dts/tesla/fsd-pinctrl.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Tesla FSD DTS pinctrl constants + * + * Copyright (c) 2016 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * Copyright (c) 2022 Linaro Ltd + * Author: Krzysztof Kozlowski <krzk@kernel.org> + */ + +#ifndef __DTS_ARM64_TESLA_FSD_PINCTRL_H__ +#define __DTS_ARM64_TESLA_FSD_PINCTRL_H__ + +#define FSD_PIN_PULL_NONE 0 +#define FSD_PIN_PULL_DOWN 1 +#define FSD_PIN_PULL_UP 3 + +#define FSD_PIN_DRV_LV1 0 +#define FSD_PIN_DRV_LV2 2 +#define FSD_PIN_DRV_LV3 1 +#define FSD_PIN_DRV_LV4 3 + +#define FSD_PIN_FUNC_INPUT 0 +#define FSD_PIN_FUNC_OUTPUT 1 +#define FSD_PIN_FUNC_2 2 +#define FSD_PIN_FUNC_3 3 +#define FSD_PIN_FUNC_4 4 +#define FSD_PIN_FUNC_5 5 +#define FSD_PIN_FUNC_6 6 +#define FSD_PIN_FUNC_EINT 0xf +#define FSD_PIN_FUNC_F FSD_PIN_FUNC_EINT + +#endif /* __DTS_ARM64_TESLA_FSD_PINCTRL_H__ */ |