diff options
| author | Roger Quadros <rogerq@ti.com> | 2019-10-28 11:37:29 +0200 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2019-11-08 11:41:54 +0200 |
| commit | 451555c80bc66551278d92575030fab6bf04641c (patch) | |
| tree | 6f0cd712f0029ac677f3256a318953d0aa042327 /arch/arm64/boot/dts/ti/k3-j721e.dtsi | |
| parent | 337c4a888ba21aaff421426b26166593572eed31 (diff) | |
| download | linux-451555c80bc66551278d92575030fab6bf04641c.tar.bz2 | |
arm64: dts: ti: k3-j721e-main: add USB controller nodes
J721e has 2 USB super-speed controllers add them.
The USB2 PHY doesn't need any configuration.
USB3 PHY needs to be implemented using the Cadence
Sierra PHY. This support will be added later.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-j721e.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721e.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 43ea1ba97922..ee5470edb435 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -127,6 +127,8 @@ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ + <0x00 0x06000000 0x00 0x06000000 0x00 0x00400000>, /* USBSS0 */ + <0x00 0x06400000 0x00 0x06400000 0x00 0x00400000>, /* USBSS1 */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */ <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */ <0x00 0x0d000000 0x00 0x0d000000 0x00 0x01000000>, /* PCIe Core*/ |