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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-09 11:53:48 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-09-18 14:53:34 +0200 |
| commit | a43306faeea860a6e36b1f0e23881ab4bb75943e (patch) | |
| tree | cb19b2ee9311100784bd98ae05fba220da496a2b /arch/arm64/boot/dts/renesas | |
| parent | 5b8adc815b80eb66d1a028ec7ce0d56ce6c7a81a (diff) | |
| download | linux-a43306faeea860a6e36b1f0e23881ab4bb75943e.tar.bz2 | |
arm64: dts: renesas: r8a779g0: Add RWDT node
Add a device node for the RCLK Watchdog Timer (RWDT) on the Renesas
R-Car V4H (R8A779G0) SoC.
Based on a patch in the BSP by Thanh Quan.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/187904c279be6654ea3deb11b7250b64dd18c3b5.1662715538.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 1c15726cff8b..63319fee25d9 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -59,6 +59,17 @@ #size-cells = <2>; ranges; + rwdt: watchdog@e6020000 { + compatible = "renesas,r8a779g0-wdt", + "renesas,rcar-gen4-wdt"; + reg = <0 0xe6020000 0 0x0c>; + interrupts = <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A779G0_PD_ALWAYS_ON>; + resets = <&cpg 907>; + status = "disabled"; + }; + cpg: clock-controller@e6150000 { compatible = "renesas,r8a779g0-cpg-mssr"; reg = <0 0xe6150000 0 0x4000>; |