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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-07-04 18:16:26 +0200 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-07-05 09:10:18 +0200 |
commit | 3896b8f09271403b641ce09de6b5362fbd622430 (patch) | |
tree | 29721eaeeb643dcd4f08edd3f60f92d01d861d50 /arch/arm64/boot/dts/renesas | |
parent | 5b6d7c3c5861ad4ad43eb7b7b64689221b2fc53f (diff) | |
download | linux-3896b8f09271403b641ce09de6b5362fbd622430.tar.bz2 |
arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order
The scif0 nodes were accidentally inserted after the scif3 nodes,
breaking alphabetical sort order.
Fixes: 1614c8624a48b9c9 ("arm64: dts: renesas: spider-cpu: Enable SCIF0 on second connector")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/2fe0e782351c202ed009dcd658f4bceec8f3a56d.1656951240.git.geert+renesas@glider.be
Diffstat (limited to 'arch/arm64/boot/dts/renesas')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi index 81d178e69527..28fbf7bc1eb4 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0-spider-cpu.dtsi @@ -55,16 +55,16 @@ function = "i2c4"; }; - scif3_pins: scif3 { - groups = "scif3_data", "scif3_ctrl"; - function = "scif3"; - }; - scif0_pins: scif0 { groups = "scif0_data", "scif0_ctrl"; function = "scif0"; }; + scif3_pins: scif3 { + groups = "scif3_data", "scif3_ctrl"; + function = "scif3"; + }; + scif_clk_pins: scif_clk { groups = "scif_clk"; function = "scif_clk"; @@ -76,16 +76,16 @@ status = "okay"; }; -&scif3 { - pinctrl-0 = <&scif3_pins>; +&scif0 { + pinctrl-0 = <&scif0_pins>; pinctrl-names = "default"; uart-has-rtscts; status = "okay"; }; -&scif0 { - pinctrl-0 = <&scif0_pins>; +&scif3 { + pinctrl-0 = <&scif3_pins>; pinctrl-names = "default"; uart-has-rtscts; |