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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2021-04-21 17:02:21 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-04-27 09:09:03 +0200 |
| commit | 0a96c05995ef1085f9c5e6bf005a04915dd2ec6f (patch) | |
| tree | d8e10eb2716231c13f852f034128d3804dc661a1 /arch/arm64/boot/dts/renesas/r8a774b1.dtsi | |
| parent | 366db3ac3cdf97e90695282b959c75d5ea58cf00 (diff) | |
| download | linux-0a96c05995ef1085f9c5e6bf005a04915dd2ec6f.tar.bz2 | |
arm64: dts: renesas: Add port@0 node for all CSI-2 nodes to dtsi
The port@0 is a mandatory port, add or move the declaration to the CSI-2
nodes top declared in dtsi files instead of depending on dts files
adding them when describing the external connection.
This fixes validation warnings for DTB outputs that do not connect all
CSI-2 receivers to transmitters and thus declaring all port@0 nodes in
dts files.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210421150221.3202955-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774b1.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 5b05474dc272..d16a4be5ef77 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -2419,6 +2419,10 @@ #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -2474,6 +2478,10 @@ #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; |