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| author | Thierry Reding <treding@nvidia.com> | 2021-06-03 18:46:31 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-06-11 13:33:32 +0200 |
| commit | b966d2db05a70263ddffc795eb544b94427fc327 (patch) | |
| tree | 436aeb78cb919b351565c55d6e54a9efa0f48c0b /arch/arm64/boot/dts/nvidia | |
| parent | bb84a31bed146bb5a4dcb9eb7fc63458fdc4d6e2 (diff) | |
| download | linux-b966d2db05a70263ddffc795eb544b94427fc327.tar.bz2 | |
arm64: tegra: Hook up memory controller to SMMU on Tegra186
On Tegra186 and later, the memory controller needs to be programmed in
coordination with any of the ARM SMMU instances to configure the stream
ID used for each memory client.
To support this, add a phandle reference to the memory controller to the
SMMU device tree node.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index a173f40256ae..d02f6bf3e2ca 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1152,6 +1152,8 @@ stream-match-mask = <0x7f80>; #global-interrupts = <1>; #iommu-cells = <1>; + + nvidia,memory-controller = <&mc>; }; host1x@13e00000 { |