diff options
| author | Thierry Reding <treding@nvidia.com> | 2022-09-02 17:05:29 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2022-09-15 21:30:37 +0200 |
| commit | b0c1a994f66050034c970a8187d88d4e1283f9d9 (patch) | |
| tree | 119907dd314e39f6593b57282d1201aebc8910bd /arch/arm64/boot/dts/nvidia | |
| parent | a1e3de6ea5193b5a50d0af6095234a6fe278b2c2 (diff) | |
| download | linux-b0c1a994f66050034c970a8187d88d4e1283f9d9.tar.bz2 | |
arm64: tegra: Fixup iommu-map property formatting
Make sure that each phandle-array is enclosed in a set of angular
brackets and properly indent each entry.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186.dtsi | 17 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 17 |
2 files changed, 16 insertions, 18 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 59a10fb184f8..526272f76637 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1485,15 +1485,14 @@ iommus = <&smmu TEGRA186_SID_HOST1X>; /* Context isolation domains */ - iommu-map = < - 0 &smmu TEGRA186_SID_HOST1X_CTX0 1 - 1 &smmu TEGRA186_SID_HOST1X_CTX1 1 - 2 &smmu TEGRA186_SID_HOST1X_CTX2 1 - 3 &smmu TEGRA186_SID_HOST1X_CTX3 1 - 4 &smmu TEGRA186_SID_HOST1X_CTX4 1 - 5 &smmu TEGRA186_SID_HOST1X_CTX5 1 - 6 &smmu TEGRA186_SID_HOST1X_CTX6 1 - 7 &smmu TEGRA186_SID_HOST1X_CTX7 1>; + iommu-map = <0 &smmu TEGRA186_SID_HOST1X_CTX0 1>, + <1 &smmu TEGRA186_SID_HOST1X_CTX1 1>, + <2 &smmu TEGRA186_SID_HOST1X_CTX2 1>, + <3 &smmu TEGRA186_SID_HOST1X_CTX3 1>, + <4 &smmu TEGRA186_SID_HOST1X_CTX4 1>, + <5 &smmu TEGRA186_SID_HOST1X_CTX5 1>, + <6 &smmu TEGRA186_SID_HOST1X_CTX6 1>, + <7 &smmu TEGRA186_SID_HOST1X_CTX7 1>; dpaux1: dpaux@15040000 { compatible = "nvidia,tegra186-dpaux"; diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index d0ed55e5c860..ed2fd951122b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -1869,15 +1869,14 @@ iommus = <&smmu TEGRA194_SID_HOST1X>; /* Context isolation domains */ - iommu-map = < - 0 &smmu TEGRA194_SID_HOST1X_CTX0 1 - 1 &smmu TEGRA194_SID_HOST1X_CTX1 1 - 2 &smmu TEGRA194_SID_HOST1X_CTX2 1 - 3 &smmu TEGRA194_SID_HOST1X_CTX3 1 - 4 &smmu TEGRA194_SID_HOST1X_CTX4 1 - 5 &smmu TEGRA194_SID_HOST1X_CTX5 1 - 6 &smmu TEGRA194_SID_HOST1X_CTX6 1 - 7 &smmu TEGRA194_SID_HOST1X_CTX7 1>; + iommu-map = <0 &smmu TEGRA194_SID_HOST1X_CTX0 1>, + <1 &smmu TEGRA194_SID_HOST1X_CTX1 1>, + <2 &smmu TEGRA194_SID_HOST1X_CTX2 1>, + <3 &smmu TEGRA194_SID_HOST1X_CTX3 1>, + <4 &smmu TEGRA194_SID_HOST1X_CTX4 1>, + <5 &smmu TEGRA194_SID_HOST1X_CTX5 1>, + <6 &smmu TEGRA194_SID_HOST1X_CTX6 1>, + <7 &smmu TEGRA194_SID_HOST1X_CTX7 1>; nvdec@15140000 { compatible = "nvidia,tegra194-nvdec"; |