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| author | Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-12-21 13:17:38 -0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2021-01-27 00:11:50 +0100 |
| commit | 96ded827a2e8da0ac74ea92d1eb5ebd9e22c2724 (patch) | |
| tree | d196883c0e66eed1a901abcb0674c8329819d690 /arch/arm64/boot/dts/nvidia | |
| parent | 07910a79fc340881eb8e3ed9e47654574fa83d3f (diff) | |
| download | linux-96ded827a2e8da0ac74ea92d1eb5ebd9e22c2724.tar.bz2 | |
arm64: tegra: Add QSPI nodes on Tegra194
Tegra194 has 2 QSPI controllers.
This patch adds DT node for these 2 QSPI controllers.
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm64/boot/dts/nvidia')
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra194.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi index 25f36d6118f8..852980fe0d35 100644 --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi @@ -609,6 +609,34 @@ status = "disabled"; }; + spi@3270000 { + compatible = "nvidia,tegra194-qspi"; + reg = <0x3270000 0x1000>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&bpmp TEGRA194_CLK_QSPI0>, + <&bpmp TEGRA194_CLK_QSPI0_PM>; + clock-names = "qspi", "qspi_out"; + resets = <&bpmp TEGRA194_RESET_QSPI0>; + reset-names = "qspi"; + status = "disabled"; + }; + + spi@3300000 { + compatible = "nvidia,tegra194-qspi"; + reg = <0x3300000 0x1000>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&bpmp TEGRA194_CLK_QSPI1>, + <&bpmp TEGRA194_CLK_QSPI1_PM>; + clock-names = "qspi", "qspi_out"; + resets = <&bpmp TEGRA194_RESET_QSPI1>; + reset-names = "qspi"; + status = "disabled"; + }; + pwm1: pwm@3280000 { compatible = "nvidia,tegra194-pwm", "nvidia,tegra186-pwm"; |