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author | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-08-04 23:25:50 -0500 |
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committer | Dinh Nguyen <dinguyen@opensource.altera.com> | 2015-10-06 04:42:38 -0500 |
commit | 78cd6a9d8e154fe2ac5d2b912519e27545cfd13b (patch) | |
tree | 8304364fe682d778967d36d93017df80594154a6 /arch/arm64/boot/dts/altera/Makefile | |
parent | 19c21388272a64c0cd5c4a6a24eca33507ee6d50 (diff) | |
download | linux-78cd6a9d8e154fe2ac5d2b912519e27545cfd13b.tar.bz2 |
arm64: dts: Add base stratix 10 dtsi
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Add a non-zero ranges property for /soc node
v3: change #address-cells and #size-cells to <2>
change the GIC address to 0xfffc1000
update the GIC virtual CPU reg length to 0x2000
v2: use interrupt-affinity for pmu node
Diffstat (limited to 'arch/arm64/boot/dts/altera/Makefile')
-rw-r--r-- | arch/arm64/boot/dts/altera/Makefile | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/altera/Makefile b/arch/arm64/boot/dts/altera/Makefile new file mode 100644 index 000000000000..d7a641698d77 --- /dev/null +++ b/arch/arm64/boot/dts/altera/Makefile @@ -0,0 +1,5 @@ +dtb-$(CONFIG_ARCH_STRATIX10) += socfpga_stratix10_socdk.dtb + +always := $(dtb-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb |