summaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/proc-v7-2level.S
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@armlinux.org.uk>2018-04-20 10:06:27 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2018-05-31 10:39:55 +0100
commit06c23f5ffe7ad45b908d0fff604dae08a7e334b9 (patch)
tree38e2ae7fcf3b0413a87f8e4126688cbf49fd008e /arch/arm/mm/proc-v7-2level.S
parentc58d237d0852a57fde9bc2c310972e8f4e3d155d (diff)
downloadlinux-06c23f5ffe7ad45b908d0fff604dae08a7e334b9.tar.bz2
ARM: spectre-v2: harden branch predictor on context switches
Harden the branch predictor against Spectre v2 attacks on context switches for ARMv7 and later CPUs. We do this by: Cortex A9, A12, A17, A73, A75: invalidating the BTB. Cortex A15, Brahma B15: invalidating the instruction cache. Cortex A57 and Cortex A72 are not addressed in this patch. Cortex R7 and Cortex R8 are also not addressed as we do not enforce memory protection on these cores. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Boot-tested-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Tony Lindgren <tony@atomide.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/mm/proc-v7-2level.S')
-rw-r--r--arch/arm/mm/proc-v7-2level.S6
1 files changed, 0 insertions, 6 deletions
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index c6141a5435c3..f8d45ad2a515 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -41,11 +41,6 @@
* even on Cortex-A8 revisions not affected by 430973.
* If IBE is not set, the flush BTAC/BTB won't do anything.
*/
-ENTRY(cpu_ca8_switch_mm)
-#ifdef CONFIG_MMU
- mov r2, #0
- mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
-#endif
ENTRY(cpu_v7_switch_mm)
#ifdef CONFIG_MMU
mmid r1, r1 @ get mm->context.id
@@ -66,7 +61,6 @@ ENTRY(cpu_v7_switch_mm)
#endif
bx lr
ENDPROC(cpu_v7_switch_mm)
-ENDPROC(cpu_ca8_switch_mm)
/*
* cpu_v7_set_pte_ext(ptep, pte)