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authorVladimir Murzin <vladimir.murzin@arm.com>2018-04-03 10:39:23 +0100
committerRussell King <rmk+kernel@armlinux.org.uk>2018-05-19 11:53:46 +0100
commit046835b4aa22b9ab6aa0bb274e3b71047c4b887d (patch)
tree1f1e8dc8ed4c30f03ba51d930a6f79a923959937 /arch/arm/mm/nommu.c
parent3c24121039c9da14692eb48f6e39565b28c0f3cf (diff)
downloadlinux-046835b4aa22b9ab6aa0bb274e3b71047c4b887d.tar.bz2
ARM: 8757/1: NOMMU: Support PMSAv8 MPU
ARMv8R/M architecture defines new memory protection scheme - PMSAv8 which is not compatible with PMSAv7. Key differences to PMSAv7 are: - Region geometry is defined by base and limit addresses - Addresses need to be either 32 or 64 byte aligned - No region priority due to overlapping regions are not allowed - It is unified, i.e. no distinction between data/instruction regions - Memory attributes are controlled via MAIR This patch implements support for PMSAv8 MPU defined by ARMv8R/M architecture. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/mm/nommu.c')
-rw-r--r--arch/arm/mm/nommu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index edbaa47be160..5dd6c58d653b 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -107,6 +107,9 @@ static void __init adjust_lowmem_bounds_mpu(void)
case MMFR0_PMSAv7:
pmsav7_adjust_lowmem_bounds();
break;
+ case MMFR0_PMSAv8:
+ pmsav8_adjust_lowmem_bounds();
+ break;
default:
break;
}
@@ -120,6 +123,9 @@ static void __init mpu_setup(void)
case MMFR0_PMSAv7:
pmsav7_setup();
break;
+ case MMFR0_PMSAv8:
+ pmsav8_setup();
+ break;
default:
break;
}