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author | Peter Zijlstra <peterz@infradead.org> | 2016-09-07 14:42:55 +0200 |
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committer | Ingo Molnar <mingo@kernel.org> | 2016-09-10 11:15:39 +0200 |
commit | 8ef9b8455a2a3049efa9e46e8a6402b972a3eb41 (patch) | |
tree | bd285322b8602641ffed3ccaa84036f46a90e032 /arch/arm/mach-sa1100/generic.h | |
parent | ef9ef3befa0d76008e988a9ed9fe439e803351b9 (diff) | |
download | linux-8ef9b8455a2a3049efa9e46e8a6402b972a3eb41.tar.bz2 |
perf/x86/intel: Fix PEBSv3 record drain
Alexander hit the WARN_ON_ONCE(!event) on his Skylake while running
the perf fuzzer.
This means the PEBSv3 record included a status bit for an inactive
event, something that _should_ not happen.
Move the code that filters the status bits against our known PEBS
events up a spot to guarantee we only deal with events we know about.
Further add "continue" statements to the WARN_ON_ONCE()s such that
we'll not die nor generate silly events in case we ever do hit them
again.
Reported-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Tested-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vince@deater.net>
Cc: stable@vger.kernel.org
Fixes: a3d86542de88 ("perf/x86/intel/pebs: Add PEBSv3 decoding")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-sa1100/generic.h')
0 files changed, 0 insertions, 0 deletions