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authorRussell King <rmk+kernel@arm.linux.org.uk>2012-01-24 09:25:57 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-02-09 15:34:13 +0000
commit49e01e3fb6efe1b0abfa2d5675f88f07989d621f (patch)
tree52baf603503e37727e58ae1a3e8178e09fd1a423 /arch/arm/mach-sa1100/assabet.c
parent4f592e6d1a6711b2ef140b5c76342dbe2506c8cb (diff)
downloadlinux-49e01e3fb6efe1b0abfa2d5675f88f07989d621f.tar.bz2
ARM: sa11x0: assabet: ensure that GPIO27 is driven
GPIO27 is just connected to a CPLD input without any pull-ups or pull- downs. If GPIO27 is left as an input, it will float around mid-supply, which for CMOS inputs is the worst place for a pin to be. Ensure that this pin is driven. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/assabet.c')
-rw-r--r--arch/arm/mach-sa1100/assabet.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/assabet.c b/arch/arm/mach-sa1100/assabet.c
index 6356896587bf..e3805d4c052a 100644
--- a/arch/arm/mach-sa1100/assabet.c
+++ b/arch/arm/mach-sa1100/assabet.c
@@ -215,6 +215,14 @@ static void __init assabet_init(void)
GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
/*
+ * Also set GPIO27 as an output; this is used to clock UART3
+ * via the FPGA and as otherwise has no pullups or pulldowns,
+ * so stop it floating.
+ */
+ GPCR = GPIO_GPIO27;
+ GPDR |= GPIO_GPIO27;
+
+ /*
* Set up registers for sleep mode.
*/
PWER = PWER_GPIO0;