diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2014-11-20 11:39:58 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2014-11-20 11:39:58 +0100 |
| commit | 3cb0df93bce1538c01c3933bd4666078d84d123b (patch) | |
| tree | aa4fee6542ee8c8fd8117ec107ffe88790a76c4a /arch/arm/mach-omap2/clock.c | |
| parent | c830343a889baaedb33917f5fee228d0a5ecf465 (diff) | |
| parent | 9889278181bcdbae882664d8cee5bb0e064397e4 (diff) | |
| download | linux-3cb0df93bce1538c01c3933bd4666078d84d123b.tar.bz2 | |
Merge tag 'omap-for-v3.19/clocks-and-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
Pull "omap soc changes for v3.19" from Tony Lindgren:
SoC related changes for omaps. Mostly to make PM easier to use for
omap4 and later, and to fix clock DPLL fixes by adding determine_rate
and set_rate_and_parent.
* tag 'omap-for-v3.19/clocks-and-pm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: hwmod: drop unnecessary list initialization
ARM: OMAP3+: DPLL: use determine_rate() and set_rate_and_parent()
ARM: OMAP3: clock: add support for dpll4_set_rate_and_parent
ARM: OMAP4: clock: add support for determine_rate for omap4 regm4xen DPLL
ARM: OMAP3: clock: add new rate changing logic support for noncore DPLLs
ARM: OMAP3: clock: use clk_features flags for omap3 DPLL4 checks
ARM: OMAP4+: PM: Program CPU logic power state
ARM: OMAP4+: PM: Centralize static dependency mapping table
ARM: OMAP4: PM: Only do static dependency configuration in omap4_init_static_deps
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-omap2/clock.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 500530d1364a..c2b239857cc4 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -771,4 +771,8 @@ void __init ti_clk_init_features(void) ti_clk_features.cm_idlest_val = OMAP24XX_CM_IDLEST_VAL; else if (cpu_is_omap34xx()) ti_clk_features.cm_idlest_val = OMAP34XX_CM_IDLEST_VAL; + + /* On OMAP3430 ES1.0, DPLL4 can't be re-programmed */ + if (omap_rev() == OMAP3430_REV_ES1_0) + ti_clk_features.flags |= TI_CLK_DPLL4_DENY_REPROGRAM; } |