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| author | Linus Walleij <linus.walleij@linaro.org> | 2021-04-29 23:25:11 +0200 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2021-06-16 15:14:21 +0200 |
| commit | 713ce38d46eb5caef20aeb8f9794ce4521cb58bf (patch) | |
| tree | 8d34f54308aecb15011c20297cdd75f3ad879e2d /arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | |
| parent | 6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff) | |
| download | linux-713ce38d46eb5caef20aeb8f9794ce4521cb58bf.tar.bz2 | |
ARM/ixp4xx: Move the virtual IObases
UART1, UART2 and the expansion bus config registers
are the only registers mapped in a fixed location
when using device tree.
For device tree we also want to get rid of the custom
<mach/io.h> for IXP4xx. So we need to undefine
CONFIG_NEED_MACH_IO_H. Doing that activates the fixed
mapping of the PCI IO space to PCI_IO_VIRT_BASE which
is hardcoded to 0xFEE00000 and this would collide with
the old fixed mappings.
Move the fixed virtual IO base address from 0xFEF00000
to 0xFEC00000 in order to avoid the collision.
For the OF-only boot path let's even cut the reliance
on <mach/io.h> and just hardcode the one single virtbase
we need apart from the UART, which is hardcoded in
Kconfig.debug.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khalasa@piap.pl>
Cc: Zoltan HERPAI <wigyori@uid0.hu>
Cc: Raylynn Knight <rayknight@me.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h')
| -rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index 708d085ce39f..f375c1c005d4 100644 --- a/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h @@ -45,21 +45,21 @@ * it can be used with the low-level debug code. */ #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000 -#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEF00000) +#define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEC00000) #define IXP4XX_PERIPHERAL_REGION_SIZE 0x00013000 /* * PCI Config registers */ #define IXP4XX_PCI_CFG_BASE_PHYS 0xC0000000 -#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEF13000) +#define IXP4XX_PCI_CFG_BASE_VIRT IOMEM(0xFEC13000) #define IXP4XX_PCI_CFG_REGION_SIZE 0x00001000 /* * Expansion BUS Configuration registers */ #define IXP4XX_EXP_CFG_BASE_PHYS 0xC4000000 -#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEF14000 +#define IXP4XX_EXP_CFG_BASE_VIRT 0xFEC14000 #define IXP4XX_EXP_CFG_REGION_SIZE 0x00001000 #define IXP4XX_EXP_CS0_OFFSET 0x00 @@ -120,6 +120,7 @@ #define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000) +/* The UART is explicitly put in the beginning of fixmap */ #define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) #define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) #define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) |