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| author | Arnd Bergmann <arnd@arndb.de> | 2012-02-27 17:22:36 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-29 12:03:08 +0000 |
| commit | 7eca30aef7961e68ad74c0ef920546c2be7f6579 (patch) | |
| tree | d7161459a86134bee58b8a0980a15b66839467aa /arch/arm/mach-at91/include/mach/cpu.h | |
| parent | d65b4e98d7ea3038b767b70fe8be959b2913f16d (diff) | |
| parent | d5e5a7f987458f42f24a557a0f4e35f94c43fc09 (diff) | |
| download | linux-7eca30aef7961e68ad74c0ef920546c2be7f6579.tar.bz2 | |
Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91 into at91/staging/base2+cleanup
* 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91: (20 commits)
ARM: at91: properly sort dtb files in Makefile.boot
ARM: at91: add at91sam9g25ek.dts in Makefile.boot
ARM: at91/board-dt: drop default console
Atmel: move console default platform_device to serial driver
ARM: at91: merge SRAM Memory banks thanks to mirroring
ARM: at91: finally drop at91_sys_read/write
ARM: at91/rtc-at91sam9: pass the GPBR to use via resources
ARM: at91:rtc/rtc-at91sam9: ioremap register bank
ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
ARM: at91/PMC: make register base soc independent
ARM: at91/PMC: move assignment out of printf
ARM: at91/pm_slowclock: add runtime detection of memory contoller
ARM: at91: make sdram/ddr register base soc independent
ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h
ARM: at91/pm_slowclock: function slow_clock() accepts parameters
ARM: at91/pm_slowclock: rename register to named define
ARM: at91/ST: remove not needed casts
ARM: at91: make ST (System Timer) soc independent
ARM: at91: make matrix register base soc independent
ARM: at91/at91x40: remove use of at91_sys_read/write
Based on top of the at91/9x5, rmk/for-armsoc, at91/device-board,
at91/pm_cleanup and at91/base.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/cpu.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/cpu.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-at91/include/mach/cpu.h b/arch/arm/mach-at91/include/mach/cpu.h index f6ce936dba2b..0118c3338552 100644 --- a/arch/arm/mach-at91/include/mach/cpu.h +++ b/arch/arm/mach-at91/include/mach/cpu.h @@ -25,7 +25,6 @@ #define ARCH_ID_AT91SAM9G45MRL 0x819b05a2 /* aka 9G45-ES2 & non ES lots */ #define ARCH_ID_AT91SAM9G45ES 0x819b05a1 /* 9G45-ES (Engineering Sample) */ #define ARCH_ID_AT91SAM9X5 0x819a05a0 -#define ARCH_ID_AT91CAP9 0x039A03A0 #define ARCH_ID_AT91SAM9XE128 0x329973a0 #define ARCH_ID_AT91SAM9XE256 0x329a93a0 @@ -51,10 +50,6 @@ #define ARCH_FAMILY_AT91SAM9 0x01900000 #define ARCH_FAMILY_AT91SAM9XE 0x02900000 -/* PMC revision */ -#define ARCH_REVISION_CAP9_B 0x399 -#define ARCH_REVISION_CAP9_C 0x601 - /* RM9200 type */ #define ARCH_REVISON_9200_BGA (0 << 0) #define ARCH_REVISON_9200_PQFP (1 << 0) @@ -63,9 +58,6 @@ enum at91_soc_type { /* 920T */ AT91_SOC_RM9200, - /* CAP */ - AT91_SOC_CAP9, - /* SAM92xx */ AT91_SOC_SAM9260, AT91_SOC_SAM9261, AT91_SOC_SAM9263, @@ -86,9 +78,6 @@ enum at91_soc_subtype { /* RM9200 */ AT91_SOC_RM9200_BGA, AT91_SOC_RM9200_PQFP, - /* CAP9 */ - AT91_SOC_CAP9_REV_B, AT91_SOC_CAP9_REV_C, - /* SAM9260 */ AT91_SOC_SAM9XE, @@ -195,16 +184,6 @@ static inline int at91_soc_is_detected(void) #define cpu_is_at91sam9x25() (0) #endif -#ifdef CONFIG_ARCH_AT91CAP9 -#define cpu_is_at91cap9() (at91_soc_initdata.type == AT91_SOC_CAP9) -#define cpu_is_at91cap9_revB() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_B) -#define cpu_is_at91cap9_revC() (at91_soc_initdata.subtype == AT91_SOC_CAP9_REV_C) -#else -#define cpu_is_at91cap9() (0) -#define cpu_is_at91cap9_revB() (0) -#define cpu_is_at91cap9_revC() (0) -#endif - /* * Since this is ARM, we will never run on any AVR32 CPU. But these * definitions may reduce clutter in common drivers. |