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| author | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:16:29 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-09 16:16:29 +0000 |
| commit | dcf7ec5ee62a78123057a1e286c88ca739717409 (patch) | |
| tree | fa3f19434638a942ba66d236dde4d9aaadf8b370 /arch/arm/mach-at91/include/mach/at91sam9rl.h | |
| parent | 15db3e823c3246e3bd31fe454f5c8927eb85caf2 (diff) | |
| parent | 142f2101a86ade2d6c9dfbedf82e1b5b31c8fce6 (diff) | |
| download | linux-dcf7ec5ee62a78123057a1e286c88ca739717409.tar.bz2 | |
Merge branch 'samsung/driver' into next/drivers
Conflicts:
arch/arm/mach-mxs/include/mach/common.h
Pull in previous samsung conflict merges and do a trivial
merge of an mxs double-add conflict.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/at91sam9rl.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91sam9rl.h | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl.h b/arch/arm/mach-at91/include/mach/at91sam9rl.h index 1aabacd315d4..2bb359e60b97 100644 --- a/arch/arm/mach-at91/include/mach/at91sam9rl.h +++ b/arch/arm/mach-at91/include/mach/at91sam9rl.h @@ -69,27 +69,26 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_DMA (0xffffe600 - AT91_BASE_SYS) -#define AT91_ECC (0xffffe800 - AT91_BASE_SYS) #define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) -#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) -#define AT91_CCFG (0xffffef10 - AT91_BASE_SYS) -#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) -#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) -#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) -#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) -#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) -#define AT91_PIOD (0xfffffa00 - AT91_BASE_SYS) #define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) #define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) -#define AT91_SHDWC (0xfffffd10 - AT91_BASE_SYS) -#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) -#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) -#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) #define AT91_SCKCR (0xfffffd50 - AT91_BASE_SYS) #define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) -#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) + +#define AT91SAM9RL_BASE_DMA 0xffffe600 +#define AT91SAM9RL_BASE_ECC 0xffffe800 +#define AT91SAM9RL_BASE_SMC 0xffffec00 +#define AT91SAM9RL_BASE_DBGU AT91_BASE_DBGU0 +#define AT91SAM9RL_BASE_PIOA 0xfffff400 +#define AT91SAM9RL_BASE_PIOB 0xfffff600 +#define AT91SAM9RL_BASE_PIOC 0xfffff800 +#define AT91SAM9RL_BASE_PIOD 0xfffffa00 +#define AT91SAM9RL_BASE_SHDWC 0xfffffd10 +#define AT91SAM9RL_BASE_RTT 0xfffffd20 +#define AT91SAM9RL_BASE_PIT 0xfffffd30 +#define AT91SAM9RL_BASE_WDT 0xfffffd40 +#define AT91SAM9RL_BASE_RTC 0xfffffe00 #define AT91_USART0 AT91SAM9RL_BASE_US0 #define AT91_USART1 AT91SAM9RL_BASE_US1 |