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authorLinus Torvalds <torvalds@linux-foundation.org>2015-12-16 10:57:24 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2015-12-16 10:57:24 -0800
commita5e90b1b075f89f084047628d4ef181aded0bbfb (patch)
treeda0010e547be7bf0f3b2bac9d7c74015e5e8662f /arch/arm/kernel/swp_emulate.c
parentedb42dc7bc0da0125ceacab810a553ce1f0cac8d (diff)
parent34bfbae33ae84107d0c257edd6c6a8689a09be26 (diff)
downloadlinux-a5e90b1b075f89f084047628d4ef181aded0bbfb.tar.bz2
Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "Further ARM fixes: - Anson Huang noticed that we were corrupting a register we shouldn't be during suspend on some CPUs. - Shengjiu Wang spotted a bug in the 'swp' instruction emulation. - Will Deacon fixed a bug in the ASID allocator. - Laura Abbott fixed the kernel permission protection to apply to all threads running in the system. - I've fixed two bugs with the domain access control register handling, one to do with printing an appropriate value at oops time, and the other to further fix the uaccess_with_memcpy code" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: 8475/1: SWP emulation: Restore original *data when failed ARM: 8471/1: need to save/restore arm register(r11) when it is corrupted ARM: fix uaccess_with_memcpy() with SW_DOMAIN_PAN ARM: report proper DACR value in oops dumps ARM: 8464/1: Update all mm structures with section adjustments ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers
Diffstat (limited to 'arch/arm/kernel/swp_emulate.c')
-rw-r--r--arch/arm/kernel/swp_emulate.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/kernel/swp_emulate.c b/arch/arm/kernel/swp_emulate.c
index 5b26e7efa9ea..c3fe769d7558 100644
--- a/arch/arm/kernel/swp_emulate.c
+++ b/arch/arm/kernel/swp_emulate.c
@@ -36,10 +36,10 @@
*/
#define __user_swpX_asm(data, addr, res, temp, B) \
__asm__ __volatile__( \
- " mov %2, %1\n" \
- "0: ldrex"B" %1, [%3]\n" \
- "1: strex"B" %0, %2, [%3]\n" \
+ "0: ldrex"B" %2, [%3]\n" \
+ "1: strex"B" %0, %1, [%3]\n" \
" cmp %0, #0\n" \
+ " moveq %1, %2\n" \
" movne %0, %4\n" \
"2:\n" \
" .section .text.fixup,\"ax\"\n" \