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author | Jean-Philippe Brucker <jean-philippe.brucker@arm.com> | 2016-02-15 20:16:24 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2016-02-16 16:33:02 +0000 |
commit | e59941b9b3817c9b1dd6662d903150fe3f3c3b0b (patch) | |
tree | 84da9de031e4e26ff74f50007b810db7e01ba069 /arch/arm/kernel/hyp-stub.S | |
parent | 64ac2e74f0b21505606faf725cb5633d63b8b728 (diff) | |
download | linux-e59941b9b3817c9b1dd6662d903150fe3f3c3b0b.tar.bz2 |
ARM: 8527/1: virt: enable GICv3 system registers
ARMv8 introduces system registers for the Generic Interrupt Controllers
CPU and virtual interfaces. When GICv3 is implemented, EL2 needs to
allow the kernel to use those registers, by changing the value of
ICC_HSRE.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/hyp-stub.S')
-rw-r--r-- | arch/arm/kernel/hyp-stub.S | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S index 2a55373f49bf..0b1e4a93d67e 100644 --- a/arch/arm/kernel/hyp-stub.S +++ b/arch/arm/kernel/hyp-stub.S @@ -17,6 +17,7 @@ */ #include <linux/init.h> +#include <linux/irqchip/arm-gic-v3.h> #include <linux/linkage.h> #include <asm/assembler.h> #include <asm/virt.h> @@ -161,6 +162,29 @@ ARM_BE8(orr r7, r7, #(1 << 25)) @ HSCTLR.EE 1: #endif +#ifdef CONFIG_ARM_GIC_V3 + @ Check whether GICv3 system registers are available + mrc p15, 0, r7, c0, c1, 1 @ ID_PFR1 + ubfx r7, r7, #28, #4 + cmp r7, #1 + bne 2f + + @ Enable system register accesses + mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE + orr r7, r7, #(ICC_SRE_EL2_ENABLE | ICC_SRE_EL2_SRE) + mcr p15, 4, r7, c12, c9, 5 @ ICC_HSRE + isb + + @ SRE bit could be forced to 0 by firmware. + @ Check whether it sticks before accessing any other sysreg + mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE + tst r7, #ICC_SRE_EL2_SRE + beq 2f + mov r7, #0 + mcr p15, 4, r7, c12, c11, 0 @ ICH_HCR +2: +#endif + bx lr @ The boot CPU mode is left in r4. ENDPROC(__hyp_stub_install_secondary) |