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authorLinus Walleij <linus.walleij@linaro.org>2013-10-19 23:24:03 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-10-19 23:24:03 +0200
commitb41fb43911b4cb864812adec88d028cc6219f23e (patch)
treef383de554dc3640ec3081ad41fa34f7cab68de82 /arch/arm/kernel/head.S
parent0963d59bc0bbed48b06733950f5eb167e9b9a8fa (diff)
parent31d141e3a666269a3b6fcccddb0351caf7454240 (diff)
downloadlinux-b41fb43911b4cb864812adec88d028cc6219f23e.tar.bz2
Merge tag 'v3.12-rc6' into devel
Linux 3.12-rc6 Conflicts: drivers/gpio/gpio-lynxpoint.c
Diffstat (limited to 'arch/arm/kernel/head.S')
-rw-r--r--arch/arm/kernel/head.S21
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 2c7cc1e03473..476de57dcef2 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -487,7 +487,26 @@ __fixup_smp:
mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
and r0, r0, #0xc0000000 @ multiprocessing extensions and
teq r0, #0x80000000 @ not part of a uniprocessor system?
- moveq pc, lr @ yes, assume SMP
+ bne __fixup_smp_on_up @ no, assume UP
+
+ @ Core indicates it is SMP. Check for Aegis SOC where a single
+ @ Cortex-A9 CPU is present but SMP operations fault.
+ mov r4, #0x41000000
+ orr r4, r4, #0x0000c000
+ orr r4, r4, #0x00000090
+ teq r3, r4 @ Check for ARM Cortex-A9
+ movne pc, lr @ Not ARM Cortex-A9,
+
+ @ If a future SoC *does* use 0x0 as the PERIPH_BASE, then the
+ @ below address check will need to be #ifdef'd or equivalent
+ @ for the Aegis platform.
+ mrc p15, 4, r0, c15, c0 @ get SCU base address
+ teq r0, #0x0 @ '0' on actual UP A9 hardware
+ beq __fixup_smp_on_up @ So its an A9 UP
+ ldr r0, [r0, #4] @ read SCU Config
+ and r0, r0, #0x3 @ number of CPUs
+ teq r0, #0x0 @ is 1?
+ movne pc, lr
__fixup_smp_on_up:
adr r0, 1f