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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-07-11 14:35:37 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2010-10-26 11:40:03 +0530
commit5ba70372289a1fb378b95cee2cf46b0203d65291 (patch)
tree9f5fed0e160ff3476af12e51689cd6eeb9ae48a7 /arch/arm/include
parent7db27e864abe0110cec5087b77de777455581e8f (diff)
downloadlinux-5ba70372289a1fb378b95cee2cf46b0203d65291.tar.bz2
ARM: l2x0: Determine the cache size
The cache size is needed for to optimise range based maintainance operations Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/hardware/cache-l2x0.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/cache-l2x0.h b/arch/arm/include/asm/hardware/cache-l2x0.h
index d833355569cb..4633d2a8817a 100644
--- a/arch/arm/include/asm/hardware/cache-l2x0.h
+++ b/arch/arm/include/asm/hardware/cache-l2x0.h
@@ -55,6 +55,7 @@
#define L2X0_CACHE_ID_PART_MASK (0xf << 6)
#define L2X0_CACHE_ID_PART_L210 (1 << 6)
#define L2X0_CACHE_ID_PART_L310 (3 << 6)
+#define L2X0_AUX_CTRL_WAY_SIZE_MASK (0x3 << 17)
#ifndef __ASSEMBLY__
extern void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask);