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authorWill Deacon <will.deacon@arm.com>2012-08-24 15:23:06 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-08-25 09:15:57 +0100
commitdf547e08e800275a431e560a7f0a6b6f24ab2904 (patch)
treecd2478e4437d45984e9f45256d656433798a275a /arch/arm/include/asm/tlb.h
parentae3790b8a916429be5fa61da95992929e6b34d64 (diff)
downloadlinux-df547e08e800275a431e560a7f0a6b6f24ab2904.tar.bz2
ARM: 7503/1: mm: only flush both pmd entries for classic MMU
LPAE does not use two pmd entries for a pte, so the additional tlb flushing is not required. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/tlb.h')
-rw-r--r--arch/arm/include/asm/tlb.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h
index 314d4664eae7..99a19512ee26 100644
--- a/arch/arm/include/asm/tlb.h
+++ b/arch/arm/include/asm/tlb.h
@@ -199,6 +199,9 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
{
pgtable_page_dtor(pte);
+#ifdef CONFIG_ARM_LPAE
+ tlb_add_flush(tlb, addr);
+#else
/*
* With the classic ARM MMU, a pte page has two corresponding pmd
* entries, each covering 1MB.
@@ -206,6 +209,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
addr &= PMD_MASK;
tlb_add_flush(tlb, addr + SZ_1M - PAGE_SIZE);
tlb_add_flush(tlb, addr + SZ_1M);
+#endif
tlb_remove_page(tlb, pte);
}