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authorAmit Daniel Kachhap <amit.kachhap@arm.com>2022-11-17 06:28:22 +0100
committerRussell King (Oracle) <rmk+kernel@armlinux.org.uk>2022-11-28 11:57:32 +0000
commitc00a19c8b143db31d660ee965e6a6f782ef090ff (patch)
treea86521291809833382af989671c895bd85b6c3a6 /arch/arm/common/locomo.c
parent74c344e6f153dd9ae97c99ad751723e4030d4af9 (diff)
downloadlinux-c00a19c8b143db31d660ee965e6a6f782ef090ff.tar.bz2
ARM: 9268/1: vfp: Add hwcap FPHP and ASIMDHP for FEAT_FP16
Floating point half-precision (FPHP) and Advanced SIMD half-precision (ASIMDHP) are VFP features (FEAT_FP16) represented by MVFR1 identification register. These capabilities can optionally exist with VFPv3 and mandatory with VFPv4. Both these new features exist for Armv8 architecture in AArch32 state. These hwcaps may be useful for the userspace to add conditional check before trying to use FEAT_FP16 feature specific instructions. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Amit Daniel Kachhap <amit.kachhap@arm.com> Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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