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author | Olivier Schonken <olivier.schonken@gmail.com> | 2016-07-05 10:05:50 +0200 |
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committer | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2016-08-08 12:08:00 +0200 |
commit | e46f48ad86f4483dfaa5947a7b7dbd4a63b0398a (patch) | |
tree | 307655499424e6aee28e9def4bad2014df11f449 /arch/arm/boot/dts/sama5d2.dtsi | |
parent | 29b4817d4018df78086157ea3a55c1d9424a7cfc (diff) | |
download | linux-e46f48ad86f4483dfaa5947a7b7dbd4a63b0398a.tar.bz2 |
ARM: dts: at91: sama5d2: add ETM and ETB nodes
Add node to support SAMA5D2 Embedded Trace Macrocell and Embedded
Trace Buffer.
This patch depends on coresight-etm3x: Add ARM ETM-A5 peripheral ID
for proper coresight functionality.
It also depends on clocksource: timer-atmel-pit: enable mck to not
stall SAMA5D2 on bootup.
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sama5d2.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index 353d0e5ec83b..7173ec9059a1 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -77,6 +77,35 @@ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>; }; + etb { + compatible = "arm,coresight-etb10", "arm,primecell"; + reg = <0x740000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etb_in: endpoint { + slave-mode; + remote-endpoint = <&etm_out>; + }; + }; + }; + + etm { + compatible = "arm,coresight-etm3x", "arm,primecell"; + reg = <0x73C000 0x1000>; + + clocks = <&mck>; + clock-names = "apb_pclk"; + + port { + etm_out: endpoint { + remote-endpoint = <&etb_in>; + }; + }; + }; + memory { reg = <0x20000000 0x20000000>; }; |