diff options
author | Arnd Bergmann <arnd@arndb.de> | 2017-10-30 14:06:39 +0100 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2017-10-30 14:06:39 +0100 |
commit | da7920e31de98a149ab4048d7f05913429b84c2f (patch) | |
tree | 3d8b28bd38cba3e9f725892a0dcea473d57296dc /arch/arm/boot/dts/imx6qdl-tx6.dtsi | |
parent | 0292f8a8f8e9d74ad8519c92d712039edb8f08b4 (diff) | |
parent | 27e1acb759e0409ee140f3bdaf5c70c5582ddf91 (diff) | |
download | linux-da7920e31de98a149ab4048d7f05913429b84c2f.tar.bz2 |
Merge tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Pull "i.MX device tree updates for 4.15" from Shawn Guo:
- New board support: i.MX51 ZII RDU1, i.MX53 GE Healthcare PPD, i.MX6
TX modules for MB7 from Ka-Ro Electronics, i.MX6 Wandboard revd1
variants, i.MX6 LWN DISPLAY5 board, Pistachio i.MX6Q board, i.MX6SX
Vining-2000 board.
- Use the 'vpcie-supply' property for PCIe device for boards
imx6qdl-sabresd, imx6q-novena and imx6q-cm-fx6.
- A series from Jagan Teki to update imx6qdl-icore board with audio,
touch and CAN support.
- Switch to nvmem for accessing OCOTP from tempmon for i.MX6SX and add
tempmon support for i.MX6UL.
- A bunch of patches from Lothar Waßmann updating Ka-Ro i.MX28, i.MX53
and i.MX6 TX modules.
- Fix DTC warnings in i.MX device trees, dropping leading zeros from
unit address, correcting display nodes notation and display port
names, fixing nodes with unit name and no reg property.
- Other random device updates for various board support.
* tag 'imx-dt-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (63 commits)
ARM: dts: imx53-tx53: fix interrupt flags
ARM: dts: imx28-tx28: fix interrupt flags
ARM: dts: display5: Device tree description of LWN's DISPLAY5 board
ARM: dts: imx53-qsb-common: Fix 'led_gpio7_7@0' node with unit name and no reg property
ARM: dts: imx53-m53evk: Fix 'led_gpio@0' node with unit name and no reg property
ARM: dts: imx53: Fix 'usbphy@x' node with unit name and no reg property
ARM: dts: imx51-ts4800: Fix 'port@0' node with unit name and no reg property
ARM: dts: imx51-apf51dev: Fix 'backlight@bl1' node with unit name and no reg property
ARM: dts: imx: add ZII RDU1 board
ARM: dts: imx: add support for TX6 modules on MB7 baseboard
ARM: dts: imx: add support for TX6QP
ARM: dts: imx6-tx6: add a .dtsi file for the MB7 baseboard
ARM: dts: imx6-tx6: move display configuration to .dtsi file
ARM: dts: imx6-tx6: add support for I2C bus recovery
ARM: dts: imx6-tx6: convert to using simple-audio-card
ARM: dts: imx6-tx6: specify ethernet phy reset post-delay
ARM: dts: imx6-tx6: improve ethernet related pinctrl setup
ARM: dts: imx6-tx6: add trickle-charge config for DS1339
ARM: dts: imx6-tx6: remove obsolete ipu1 alias
ARM: dts: imx6-tx6: remove obsolete eeti,egalax_ts
...
[arnd: made sure we have no new leading zeroes in unit address during merge]
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-tx6.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl-tx6.dtsi | 104 |
1 files changed, 86 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-tx6.dtsi b/arch/arm/boot/dts/imx6qdl-tx6.dtsi index 25fe6aef797b..6abb66cd7d4a 100644 --- a/arch/arm/boot/dts/imx6qdl-tx6.dtsi +++ b/arch/arm/boot/dts/imx6qdl-tx6.dtsi @@ -1,5 +1,5 @@ /* - * Copyright 2014-2016 Lothar Waßmann <LW@KARO-electronics.de> + * Copyright 2014-2017 Lothar Waßmann <LW@KARO-electronics.de> * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual @@ -43,6 +43,7 @@ #include <dt-bindings/input/input.h> #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/pwm/pwm.h> +#include <dt-bindings/sound/fsl-imx-audmux.h> / { aliases { @@ -145,7 +146,7 @@ pinctrl-0 = <&pinctrl_lcd0_pwr>; gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>; enable-active-high; - regulator-boot-on; + status = "disabled"; }; reg_lcd1_pwr: regulator-lcd1-pwr { @@ -157,7 +158,7 @@ pinctrl-0 = <&pinctrl_lcd1_pwr>; gpio = <&gpio2 31 GPIO_ACTIVE_HIGH>; enable-active-high; - regulator-boot-on; + status = "disabled"; }; reg_usbh1_vbus: regulator-usbh1-vbus { @@ -183,24 +184,56 @@ }; sound { - compatible = "karo,imx6qdl-tx6qdl-sgtl5000", - "fsl,imx-audio-sgtl5000"; - model = "sgtl5000-audio"; + compatible = "karo,imx6qdl-tx6-sgtl5000", + "simple-audio-card"; + simple-audio-card,name = "imx6qdl-tx6-sgtl5000-audio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; - ssi-controller = <&ssi1>; - audio-codec = <&sgtl5000>; - audio-routing = + simple-audio-card,format = "i2s"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Line", "Line In", + "Line", "Line Out", + "Headphone", "Headphone Jack"; + simple-audio-card,routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; - mux-int-port = <1>; - mux-ext-port = <5>; + + cpu_dai: simple-audio-card,cpu { + sound-dai = <&ssi1>; + }; + + codec_dai: simple-audio-card,codec { + sound-dai = <&sgtl5000>; + }; }; }; &audmux { status = "okay"; + + ssi1 { + fsl,audmux-port = <0>; + fsl,port-config = < + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSEL(4) | + IMX_AUDMUX_V2_PTCR_TCSEL(4) | + IMX_AUDMUX_V2_PTCR_TFSDIR | + IMX_AUDMUX_V2_PTCR_TCLKDIR) + IMX_AUDMUX_V2_PDCR_RXDSEL(4) + >; + }; + + pins5 { + fsl,audmux-port = <4>; + fsl,port-config = < + IMX_AUDMUX_V2_PTCR_SYN + IMX_AUDMUX_V2_PDCR_RXDSEL(0) + >; + }; }; &can1 { @@ -241,7 +274,7 @@ &fec { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; + pinctrl-0 = <&pinctrl_enet &pinctrl_enet_mdio &pinctrl_etnphy_rst>; clocks = <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET>, <&clks IMX6QDL_CLK_ENET_REF>, @@ -249,6 +282,7 @@ clock-names = "ipg", "ahb", "ptp", "enet_out"; phy-mode = "rmii"; phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>; + phy-reset-post-delay = <10>; phy-handle = <&etnphy>; phy-supply = <®_3v3_etn>; status = "okay"; @@ -261,8 +295,9 @@ compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet_mdio>; - interrupts-extended = <&gpio7 1 IRQ_TYPE_EDGE_FALLING>; + pinctrl-0 = <&pinctrl_etnphy_int>; + interrupt-parent = <&gpio7>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; }; }; }; @@ -276,25 +311,34 @@ }; &i2c1 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_gpio>; + scl-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; ds1339: rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; + trickle-resistor-ohms = <250>; + trickle-diode-disable; }; }; &i2c3 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_gpio>; + scl-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + sda-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; clock-frequency = <400000>; status = "okay"; sgtl5000: sgtl5000@a { compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; reg = <0x0a>; VDDA-supply = <®_2v5>; VDDIO-supply = <®_3v3>; @@ -332,8 +376,6 @@ pinctrl_hog: hoggrp { fsl,pins = < - MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */ - MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* PWR BTN */ >; }; @@ -451,12 +493,24 @@ >; }; + pinctrl_etnphy_int: etnphy-intgrp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1b0b1 /* ETN PHY INT */ + >; + }; + pinctrl_etnphy_power: etnphy-pwrgrp { fsl,pins = < MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 /* ETN PHY POWER */ >; }; + pinctrl_etnphy_rst: etnphy-rstgrp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT2__GPIO7_IO06 0x1b0b1 /* ETN PHY RESET */ + >; + }; + pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0 @@ -504,6 +558,13 @@ >; }; + pinctrl_i2c1_gpio: i2c1-gpiogrp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__GPIO3_IO21 0x4001b8b1 + MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x4001b8b1 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 @@ -511,6 +572,13 @@ >; }; + pinctrl_i2c3_gpio: i2c3-gpiogrp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1 + >; + }; + pinctrl_kpp: kppgrp { fsl,pins = < MX6QDL_PAD_GPIO_9__KEY_COL6 0x1b0b1 |