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authorDamien Riegel <damien.riegel@savoirfairelinux.com>2016-06-09 10:46:49 -0400
committerShawn Guo <shawnguo@kernel.org>2016-06-09 23:13:32 +0800
commitd6535e6a33168cc0bd49ac0712c32b64292bc1fb (patch)
treea9c72efc85ee9d1865debbe7726bfbc869719d27 /arch/arm/boot/dts/imx51-ts4800.dts
parent97f5c1817b7e3c159b2c079df97415580096b7ad (diff)
downloadlinux-d6535e6a33168cc0bd49ac0712c32b64292bc1fb.tar.bz2
ARM: dts: TS-4800: add FPGA's IRQ controller support
Enable FPGA's IRQ controller. It is in charge of dispatching interrupts generated by IPs in the FPGA. The SoC is notified that an interrupt occurred through a GPIO. Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51-ts4800.dts')
-rw-r--r--arch/arm/boot/dts/imx51-ts4800.dts17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51-ts4800.dts b/arch/arm/boot/dts/imx51-ts4800.dts
index 0ff76a1bc0f1..0e80fb7bfb2d 100644
--- a/arch/arm/boot/dts/imx51-ts4800.dts
+++ b/arch/arm/boot/dts/imx51-ts4800.dts
@@ -165,6 +165,17 @@
reg = <0x12000 0x1000>;
syscon = <&syscon 0x10 6>;
};
+
+ fpga_irqc: fpga-irqc@15000 {
+ compatible = "technologic,ts4800-irqc";
+ reg = <0x15000 0x1000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_interrupt_fpga>;
+ interrupt-parent = <&gpio2>;
+ interrupts= <9 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
};
};
@@ -228,6 +239,12 @@
>;
};
+ pinctrl_interrupt_fpga: fpgaicgrp {
+ fsl,pins = <
+ MX51_PAD_EIM_D27__GPIO2_9 0xe5
+ >;
+ };
+
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5