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| author | Zhen Lei <thunder.leizhen@huawei.com> | 2020-10-12 14:12:16 +0800 |
|---|---|---|
| committer | Wei Xu <xuwei5@hisilicon.com> | 2020-11-24 19:43:18 +0800 |
| commit | 30ea026e33c6dda48849d9fe0d15c1d280a92d53 (patch) | |
| tree | 62208f28421b1dd717f23927b878761493ee1d84 /arch/arm/boot/dts/hip04.dtsi | |
| parent | 3650b228f83adda7e5ee532e2b90429c03f7b9ec (diff) | |
| download | linux-30ea026e33c6dda48849d9fe0d15c1d280a92d53.tar.bz2 | |
ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Diffstat (limited to 'arch/arm/boot/dts/hip04.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/hip04.dtsi | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi index 555bc6b6720f..bccf5ba3d855 100644 --- a/arch/arm/boot/dts/hip04.dtsi +++ b/arch/arm/boot/dts/hip04.dtsi @@ -250,12 +250,12 @@ <0 79 4>; }; - uart0: uart@4007000 { + uart0: serial@4007000 { compatible = "snps,dw-apb-uart"; reg = <0x4007000 0x1000>; interrupts = <0 381 4>; - clocks = <&clk_168m>; - clock-names = "uartclk"; + clocks = <&clk_168m>, <&clk_168m>; + clock-names = "baudclk", "apb_pclk"; reg-shift = <2>; status = "disabled"; }; |