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authorEddie James <eajames@linux.ibm.com>2020-05-05 11:58:22 -0500
committerJoel Stanley <joel@jms.id.au>2020-07-20 14:28:06 +0930
commit645afe73f9512ee2fc636b741cacd23a513eb8d6 (patch)
tree09c5c84cbd720881a32534cd64be95bcd08004c0 /arch/arm/boot/dts/aspeed-g6.dtsi
parentb3e10b5e40eeb9cf2069d960bd09851103087bb2 (diff)
downloadlinux-645afe73f9512ee2fc636b741cacd23a513eb8d6.tar.bz2
ARM: dts: aspeed: ast2600: Update XDMA engine node
Add the PCI-E root complex reset, correct the pcie-device property, and add the Aspeed SCU interrupt controller include. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi15
1 files changed, 3 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 9d8d8e18bc90..b58220a49cbd 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -2,6 +2,7 @@
// Copyright 2019 IBM Corp.
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
#include <dt-bindings/clock/ast2600-clock.h>
/ {
@@ -346,22 +347,12 @@
resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
reset-names = "device", "root-complex";
interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
- <&scu_ic0 2>;
- pcie-device = "bmc";
+ <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
+ aspeed,pcie-device = "bmc";
aspeed,scu = <&syscon>;
status = "disabled";
};
- video: video@1e700000 {
- compatible = "aspeed,ast2600-video-engine";
- reg = <0x1e700000 0x1000>;
- clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
- <&syscon ASPEED_CLK_GATE_ECLK>;
- clock-names = "vclk", "eclk";
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
gpio0: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;