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authorThomas Gleixner <tglx@linutronix.de>2018-08-06 12:45:42 +0200
committerThomas Gleixner <tglx@linutronix.de>2018-08-06 12:45:42 +0200
commit9e90c7985229430428dc9ba0ec7fe422901b456d (patch)
treecae2072feba8cc433a32d96568bbcf36070bd6e5 /arch/arm/Kconfig
parent4f7799d96e6621ce584df60739e1480a6fd89f0a (diff)
parenta8db74564b0c634667e1722264bde303d296f566 (diff)
downloadlinux-9e90c7985229430428dc9ba0ec7fe422901b456d.tar.bz2
Merge tag 'irqchip-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier: - GICv3 ITS LPI allocation revamp - GICv3 support for hypervisor-enforced LPI range - GICv3 ITS conversion to raw spinlock
Diffstat (limited to 'arch/arm/Kconfig')
-rw-r--r--arch/arm/Kconfig8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b6be2b1be75d..d7a81284c272 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1240,8 +1240,14 @@ config PCI
VESA. If you have PCI, say Y, otherwise N.
config PCI_DOMAINS
- bool
+ bool "Support for multiple PCI domains"
depends on PCI
+ help
+ Enable PCI domains kernel management. Say Y if your machine
+ has a PCI bus hierarchy that requires more than one PCI
+ domain (aka segment) to be correctly managed. Say N otherwise.
+
+ If you don't know what to do here, say N.
config PCI_DOMAINS_GENERIC
def_bool PCI_DOMAINS