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| author | Vineet Gupta <vgupta@synopsys.com> | 2016-05-30 19:21:22 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2016-05-30 22:45:04 +0530 |
| commit | 60f2b4b8af548150cc56bf6fd213e47897964794 (patch) | |
| tree | 6a2e3317963e0315259707df98f3fd0b12ce1f53 /arch/arc/kernel/intc-compact.c | |
| parent | 49acadff2a0cb4f7ff4efe0fb6c23f5fad81a3b3 (diff) | |
| download | linux-60f2b4b8af548150cc56bf6fd213e47897964794.tar.bz2 | |
ARC: [intc-compact] simplify code for 2 priority levels
ARC700 support for 2 interrupt priorities historically allowed even slow
perpherals such as emac and uart to setup high priority interrupts
which was wrong from the beginning as they could possibly delay the more
critical timer interrupt.
The hardware support for 2 level interrupts in ARCompact is less than
ideal anyways (judging from the "hacks" in low level entry code and thus
is not used in productions systems I know of.
So reduce the scope of this to timer only, thereby reducing a bunch of
complexity.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/kernel/intc-compact.c')
| -rw-r--r-- | arch/arc/kernel/intc-compact.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arc/kernel/intc-compact.c b/arch/arc/kernel/intc-compact.c index c5cceca36118..ce9deb953ca9 100644 --- a/arch/arc/kernel/intc-compact.c +++ b/arch/arc/kernel/intc-compact.c @@ -28,10 +28,8 @@ void arc_init_IRQ(void) { int level_mask = 0; - /* setup any high priority Interrupts (Level2 in ARCompact jargon) */ - level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) << 3; - level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5; - level_mask |= IS_ENABLED(CONFIG_ARC_IRQ6_LV2) << 6; + /* Is timer high priority Interrupt (Level2 in ARCompact jargon) */ + level_mask |= IS_ENABLED(CONFIG_ARC_COMPACT_IRQ_LEVELS) << TIMER0_IRQ; /* * Write to register, even if no LV2 IRQs configured to reset it |