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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-09 14:36:27 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-09 14:36:27 -0700
commite30f4192456971623b40c97a027346b69457ef69 (patch)
tree11a9a7ccfdc18f5e448661f65b8bbf2a1007b79a /arch/arc/kernel/entry.S
parentb32729b1eeae7ef8f5709923b36b5a0906d213df (diff)
parenteacd0e950dc2100af54f2a94ae29105bf48ab921 (diff)
downloadlinux-e30f4192456971623b40c97a027346b69457ef69.tar.bz2
Merge tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC port updates from Vineet Gupta: "Support for two new platforms based on ARC700: - Abilis TB10x SoC [Chritisian/Pierrick] - Simulator only System-C Model [Mischa] ARC specific MM improvements: - Avoid full TLB flush (ASID increment) on munmap (even single page) - VIPT Cache Flushing improvements + Delayed dcache flush for non-aliasing dcache (big performance boost) + icache flush aliasing agnostic (no need to kill all possible aliases) Others: - Avoid needless rebuild of DTB files for every kernel build - Remove builtin cmdline as that is already provided by DeviceTree/bootargs - Fixing unaligned access emulation corner case - checkpatch fixes [Sachin] - Various fixlets [Noam] - Minor build failures/cleanups" * tag 'arc-v3.10-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (35 commits) ARC: [mm] Lazy D-cache flush (non aliasing VIPT) ARC: [mm] micro-optimize page size icache invalidate ARC: [mm] remove the pessimistic all-alias-invalidate icache helpers ARC: [mm] consolidate icache/dcache sync code ARC: [mm] optimise icache flush for kernel mappings ARC: [mm] optimise icache flush for user mappings ARC: [mm] optimize needless full mm TLB flush on munmap ARC: Add support for nSIM OSCI System C model ARC: [TB10x] Adapt device tree to new compatible string ARC: [TB10x] Add support for TB10x platform ARC: [TB10x] Device tree of TB100 and TB101 Development Kits ARC: Prepare interrupt code for external controllers ARC: Allow embedded arc-intc to be properly placed in DT intc hierarchy ARC: [cmdline] Don't overwrite u-boot provided bootargs ARC: [cmdline] Remove CONFIG_CMDLINE ARC: [plat-arcfpga] defconfig update ARC: unaligned access emulation broken if callee-reg dest of LD/ST ARC: unaligned access emulation error handling consolidation ARC: Debug/crash-printing Improvements ARC: fix typo with clock speed ...
Diffstat (limited to 'arch/arc/kernel/entry.S')
-rw-r--r--arch/arc/kernel/entry.S8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arc/kernel/entry.S b/arch/arc/kernel/entry.S
index 91eeab81f52d..0c6d664d4a83 100644
--- a/arch/arc/kernel/entry.S
+++ b/arch/arc/kernel/entry.S
@@ -393,12 +393,14 @@ ARC_ENTRY EV_TLBProtV
#ifdef CONFIG_ARC_MISALIGN_ACCESS
SAVE_CALLEE_SAVED_USER
mov r3, sp ; callee_regs
-#endif
bl do_misaligned_access
-#ifdef CONFIG_ARC_MISALIGN_ACCESS
- DISCARD_CALLEE_SAVED_USER
+ ; TBD: optimize - do this only if a callee reg was involved
+ ; either a dst of emulated LD/ST or src with address-writeback
+ RESTORE_CALLEE_SAVED_USER
+#else
+ bl do_misaligned_error
#endif
b ret_from_exception