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| author | Andrea Venturi <ennesimamail.av@gmail.com> | 2016-03-21 17:10:38 +0100 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-04-22 00:29:21 +0200 |
| commit | 8f0767611a0ed719caf975d899d8431834ace2d8 (patch) | |
| tree | 5c5bf867e6b491b5c2e408ab8c9191461e96c68c /Documentation | |
| parent | 92a39d9043ba5ff98adb1c31491f00c7bea5466e (diff) | |
| download | linux-8f0767611a0ed719caf975d899d8431834ace2d8.tar.bz2 | |
clk: sunxi: mod1 clock should modify it's parent
add CLK_SET_RATE_PARENT to modify the rate on clk upstream
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions