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author | Vignesh Raghavendra <vigneshr@ti.com> | 2019-11-08 22:18:56 +0530 |
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committer | Martin K. Petersen <martin.petersen@oracle.com> | 2019-11-12 22:21:33 -0500 |
commit | 8e31a94938adffb208f714a33ba651491b53a5d0 (patch) | |
tree | 657e3f3939985fdf87cec3f0afa7edd735810e27 /Documentation | |
parent | 0eccce866f84db2cd23e1f28737920aa7b9e70d7 (diff) | |
download | linux-8e31a94938adffb208f714a33ba651491b53a5d0.tar.bz2 |
scsi: dt-bindings: ufs: ti,j721e-ufs.yaml: Add binding for TI UFS wrapper
Add binding documentation of TI wrapper for Cadence UFS Controller.
Link: https://lore.kernel.org/r/20191108164857.11466-2-vigneshr@ti.com
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml new file mode 100644 index 000000000000..c8a2a92074df --- /dev/null +++ b/Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI J721e UFS Host Controller Glue Driver + +maintainers: + - Vignesh Raghavendra <vigneshr@ti.com> + +properties: + compatible: + items: + - const: ti,j721e-ufs + + reg: + maxItems: 1 + description: address of TI UFS glue registers + + clocks: + maxItems: 1 + description: phandle to the M-PHY clock + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - power-domains + +patternProperties: + "^ufs@[0-9a-f]+$": + type: object + description: | + Cadence UFS controller node must be the child node. Refer + Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding + documentation of child node + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + ufs_wrapper: ufs-wrapper@4e80000 { + compatible = "ti,j721e-ufs"; + reg = <0x0 0x4e80000 0x0 0x100>; + power-domains = <&k3_pds 277>; + clocks = <&k3_clks 277 1>; + assigned-clocks = <&k3_clks 277 1>; + assigned-clock-parents = <&k3_clks 277 4>; + #address-cells = <2>; + #size-cells = <2>; + + ufs@4e84000 { + compatible = "cdns,ufshc-m31-16nm", "jedec,ufs-2.0"; + reg = <0x0 0x4e84000 0x0 0x10000>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + freq-table-hz = <19200000 19200000>; + power-domains = <&k3_pds 277>; + clocks = <&k3_clks 277 1>; + assigned-clocks = <&k3_clks 277 1>; + assigned-clock-parents = <&k3_clks 277 4>; + clock-names = "core_clk"; + }; + }; |