Merge tag 'spi-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi updates from Mark Brown:
 "The big change this release has been some excellent work from Lukas
  Wunner which closes a bunch of holes in the cleanup paths for drivers,
  mainly introduced as a result of devm conversions causing bad
  interactions with the support SPI has for allocating the bus and
  driver data together.

  Together with some of the other work done it feels like we've turned
  the corner on several long standing pain points with the API.

  Summary:

   - Many cleanups around probe/remove and error handling from Lukas
     Wunner and Uwe Kleine-König, and further fixes around PM from Zhang
     Qilong.

   - Provide a mask for which bits of the mode can safely be configured
     by drivers and use that to fix an issue with the ADS7846 driver.

   - Documentation of the expected interactions between SPI and GPIO
     level chip select polarity configuration from H. Nikolaus Schaller,
     hopefully we're pretty much at the end of sorting out the
     interactions there. Thanks to Nikolaus, Sven Van Asbroeck and Linus
     Walleij for this.

   - DMA support for Allwinner sun6i controllers.

   - Support for Canaan K210 Designware implementations and Intel Adler
     Lake"

* tag 'spi-v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (69 commits)
  spi: dt-bindings: clarify CS behavior for spi-cs-high and gpio descriptors
  spi: Limit the spi device max speed to controller's max speed
  spi: spi-geni-qcom: Use the new method of gpio CS control
  platform/chrome: cros_ec_spi: Drop bits_per_word assignment
  platform/chrome: cros_ec_spi: Don't overwrite spi::mode
  spi: dw: Add support for the Canaan K210 SoC SPI
  spi: dw: Add support for 32-bits max xfer size
  dt-bindings: spi: dw-apb-ssi: Add Canaan K210 SPI controller
  spi: Update DT binding docs to support SiFive FU740 SoC
  spi: atmel-quadspi: Fix use-after-free on unbind
  spi: npcm-fiu: Disable clock in probe error path
  spi: ar934x: Don't leak SPI master in probe error path
  spi: mt7621: Don't leak SPI master in probe error path
  spi: mt7621: Disable clock in probe error path
  media: netup_unidvb: Don't leak SPI master in probe error path
  spi: sc18is602: Don't leak SPI master in probe error path
  spi: rb4xx: Don't leak SPI master in probe error path
  spi: gpio: Don't leak SPI master in probe error path
  spi: spi-mtk-nor: Don't leak SPI master in probe error path
  spi: mxic: Don't leak SPI master in probe error path
  ...

3 files changed, 35 insertions, 4 deletions

diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
index 99ed9b416e94..4825157cd92e 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
@@ -65,6 +65,8 @@ properties:
         const: baikal,bt1-ssi
       - description: Baikal-T1 System Boot SPI Controller
         const: baikal,bt1-sys-ssi
+      - description: Canaan Kendryte K210 SoS SPI Controller
+        const: canaan,k210-spi
 
   reg:
     minItems: 1
diff --git a/Documentation/devicetree/bindings/spi/spi-controller.yaml b/Documentation/devicetree/bindings/spi/spi-controller.yaml
index 1b56d5e40f1f..5f505810104d 100644
--- a/Documentation/devicetree/bindings/spi/spi-controller.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-controller.yaml
@@ -42,6 +42,33 @@ properties:
         cs2 : &gpio1 1 0
         cs3 : &gpio1 2 0
 
+      The second flag of a gpio descriptor can be GPIO_ACTIVE_HIGH (0)
+      or GPIO_ACTIVE_LOW(1). Legacy device trees often use 0.
+
+      There is a special rule set for combining the second flag of an
+      cs-gpio with the optional spi-cs-high flag for SPI slaves.
+
+      Each table entry defines how the CS pin is to be physically
+      driven (not considering potential gpio inversions by pinmux):
+
+      device node     | cs-gpio       | CS pin state active | Note
+      ================+===============+=====================+=====
+      spi-cs-high     | -             | H                   |
+      -               | -             | L                   |
+      spi-cs-high     | ACTIVE_HIGH   | H                   |
+      -               | ACTIVE_HIGH   | L                   | 1
+      spi-cs-high     | ACTIVE_LOW    | H                   | 2
+      -               | ACTIVE_LOW    | L                   |
+
+      Notes:
+      1) Should print a warning about polarity inversion.
+         Here it would be wise to avoid and define the gpio as
+         ACTIVE_LOW.
+      2) Should print a warning about polarity inversion
+         because ACTIVE_LOW is overridden by spi-cs-high.
+         Should be generally avoided and be replaced by
+         spi-cs-high + ACTIVE_HIGH.
+
   num-cs:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
diff --git a/Documentation/devicetree/bindings/spi/spi-sifive.yaml b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
index 56dcf1d35da4..6e7e394fc1e4 100644
--- a/Documentation/devicetree/bindings/spi/spi-sifive.yaml
+++ b/Documentation/devicetree/bindings/spi/spi-sifive.yaml
@@ -17,15 +17,17 @@ allOf:
 properties:
   compatible:
     items:
-      - const: sifive,fu540-c000-spi
+      - enum:
+          - sifive,fu540-c000-spi
+          - sifive,fu740-c000-spi
       - const: sifive,spi0
 
     description:
       Should be "sifive,<chip>-spi" and "sifive,spi<version>".
       Supported compatible strings are -
-      "sifive,fu540-c000-spi" for the SiFive SPI v0 as integrated
-      onto the SiFive FU540 chip, and "sifive,spi0" for the SiFive
-      SPI v0 IP block with no chip integration tweaks.
+      "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
+      as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
+      for the SiFive SPI v0 IP block with no chip integration tweaks.
       Please refer to sifive-blocks-ip-versioning.txt for details
 
       SPI RTL that corresponds to the IP block version numbers can be found here -