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authorLinus Torvalds <torvalds@linux-foundation.org>2014-10-21 08:17:43 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-10-21 08:17:43 -0700
commit5b9c8972527fdb52d5cd7dadc9853c57430e0ff5 (patch)
treea829bb857ae7f19369fd7479597c640d30e0f47e /Documentation
parent3d430bdb74140224d90dd6253d67ff71d181cf64 (diff)
parentdec02f98ae2e341a2e0bb25f27e84867e5f9f64a (diff)
downloadlinux-5b9c8972527fdb52d5cd7dadc9853c57430e0ff5.tar.bz2
Merge tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm changes from Thierry Reding: "There are no new drivers here, only a couple of fixes all over the place" * tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: pwm: Let PWM_CLPS711X depend on HAS_IOMEM pwm: atmel: Fix calculation of prescale value pwm: Fix uninitialized warnings in pwm_get() pwm: rockchip: Allow polarity invert on rk3288 pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2 pwm: imx: Cleanup indentation for register definitions pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error. pwm: lpss: make it buildable only on X86 pwm: lpss: use c99 initializers in structures pwm: lpss: Fix build failure on PowerPC pwm: lpss: pci: Move to use pcim_enable_device() pwm: lpss: Properly split driver to parts pwm: lpss: Add ACPI and PCI IDs for Intel Braswell pwm: fsl-ftm: Select REGMAP_MMIO pwm: fsl-ftm: Document 'big-endian' property pwm: fsl-ftm: Convert to direct regmap API usage pwm: fsl-ftm: Clean up the code
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt19
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-rockchip.txt4
2 files changed, 20 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
index 0bda229a6171..3899d6a557c1 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt
@@ -1,5 +1,20 @@
Freescale FlexTimer Module (FTM) PWM controller
+The same FTM PWM device can have a different endianness on different SoCs. The
+device tree provides a property to describing this so that an operating system
+device driver can handle all variants of the device. Refer to the table below
+for the endianness of the FTM PWM block as integrated into the existing SoCs:
+
+ SoC | FTM-PWM endianness
+ --------+-------------------
+ Vybrid | LE
+ LS1 | BE
+ LS2 | LE
+
+Please see ../regmap/regmap.txt for more detail about how to specify endian
+modes in device tree.
+
+
Required properties:
- compatible: Should be "fsl,vf610-ftm-pwm".
- reg: Physical base address and length of the controller's registers
@@ -16,7 +31,8 @@ Required properties:
- pinctrl-names: Must contain a "default" entry.
- pinctrl-NNN: One property must exist for each entry in pinctrl-names.
See pinctrl/pinctrl-bindings.txt for details of the property values.
-
+- big-endian: Boolean property, required if the FTM PWM registers use a big-
+ endian rather than little-endian layout.
Example:
@@ -32,4 +48,5 @@ pwm0: pwm@40038000 {
<&clks VF610_CLK_FTM0_EXT_FIX_EN>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_1>;
+ big-endian;
};
diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
index d47d15a6a298..b8be3d09ee26 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt
@@ -7,8 +7,8 @@ Required properties:
"rockchip,vop-pwm": found integrated in VOP on RK3288 SoC
- reg: physical base address and length of the controller's registers
- clocks: phandle and clock specifier of the PWM reference clock
- - #pwm-cells: should be 2. See pwm.txt in this directory for a
- description of the cell format.
+ - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
+ for a description of the cell format.
Example: