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authorDaniel Palmer <daniel@0x0f.com>2021-02-11 14:22:01 +0900
committerStephen Boyd <sboyd@kernel.org>2021-02-14 12:37:45 -0800
commit4f83b5233f61b7db7aaf7a8d94210e40c742fe51 (patch)
treeed1f8a4f03226cce34d7f73d97d4a63a9b7743a4 /Documentation
parent1d895931cb427b4275f3ca4ffebe1f12c6ce2e4e (diff)
downloadlinux-4f83b5233f61b7db7aaf7a8d94210e40c742fe51.tar.bz2
dt-bindings: clk: mstar msc313 mpll binding description
Add a binding description for the MStar/SigmaStar MPLL clock block. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210211052206.2955988-3-daniel@0x0f.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml46
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml b/Documentation/devicetree/bindings/clock/mstar,msc313-mpll.yaml
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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MStar/Sigmastar MSC313 MPLL
+
+maintainers:
+ - Daniel Palmer <daniel@thingy.jp>
+
+description: |
+ The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that
+ takes the external xtal input and multiplies it to create a high
+ frequency clock and divides that down into a number of clocks that
+ peripherals use.
+
+properties:
+ compatible:
+ const: mstar,msc313-mpll
+
+ "#clock-cells":
+ const: 1
+
+ clocks:
+ maxItems: 1
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - "#clock-cells"
+ - clocks
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ mpll@206000 {
+ compatible = "mstar,msc313-mpll";
+ reg = <0x206000 0x200>;
+ #clock-cells = <1>;
+ clocks = <&xtal>;
+ };