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authorRob Herring <robh@kernel.org>2022-12-09 11:16:43 -0600
committerMark Brown <broonie@kernel.org>2022-12-09 17:39:08 +0000
commit3cf241c3d56ff19f5192cb42a025bc6582b6e8fa (patch)
tree4cecaf0b2d45c0294095e7b7901a22fc26fef20a /Documentation
parent3a6f994f848a69deb2bf3cd9d130dd0c09730e55 (diff)
downloadlinux-3cf241c3d56ff19f5192cb42a025bc6582b6e8fa.tar.bz2
spi: dt-bindings: Convert Synquacer SPI to DT schema
Convert the Socionext Synquacer SPI binding to DT format. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221209171644.3351787-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml73
-rw-r--r--Documentation/devicetree/bindings/spi/spi-synquacer.txt27
2 files changed, 73 insertions, 27 deletions
diff --git a/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml b/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml
new file mode 100644
index 000000000000..45cbe744c7ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/socionext,synquacer-spi.yaml
@@ -0,0 +1,73 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/socionext,synquacer-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Socionext SynQuacer HS-SPI Controller
+
+maintainers:
+ - Masahisa Kojima <masahisa.kojima@linaro.org>
+ - Jassi Brar <jaswinder.singh@linaro.org>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ const: socionext,synquacer-spi
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ items:
+ - description: core clock
+ - description: rate clock
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iHCLK
+ - const: iPCLK
+
+ interrupts:
+ items:
+ - description: Receive Interrupt
+ - description: Transmit Interrupt
+ - description: Fault Interrupt
+
+ socionext,use-rtm:
+ type: boolean
+ description: Enable using "retimed clock" for RX
+
+ socionext,set-aces:
+ type: boolean
+ description: Enable same active clock edges field to be set
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ spi@ff110000 {
+ compatible = "socionext,synquacer-spi";
+ reg = <0xff110000 0x1000>;
+ interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_hsspi>;
+ clock-names = "iHCLK";
+ socionext,use-rtm;
+ socionext,set-aces;
+ };
+...
diff --git a/Documentation/devicetree/bindings/spi/spi-synquacer.txt b/Documentation/devicetree/bindings/spi/spi-synquacer.txt
deleted file mode 100644
index 291dfa692d0a..000000000000
--- a/Documentation/devicetree/bindings/spi/spi-synquacer.txt
+++ /dev/null
@@ -1,27 +0,0 @@
-* Socionext Synquacer HS-SPI bindings
-
-Required Properties:
-- compatible: should be "socionext,synquacer-spi"
-- reg: physical base address of the controller and length of memory mapped
- region.
-- interrupts: should contain the "spi_rx", "spi_tx" and "spi_fault" interrupts.
-- clocks: core clock iHCLK. Optional rate clock iPCLK (default is iHCLK)
-- clock-names: Shall be "iHCLK" and "iPCLK" respectively
-
-Optional Properties:
-- socionext,use-rtm: boolean, if required to use "retimed clock" for RX
-- socionext,set-aces: boolean, if same active clock edges field to be set.
-
-Example:
-
- spi0: spi@ff110000 {
- compatible = "socionext,synquacer-spi";
- reg = <0xff110000 0x1000>;
- interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_hsspi>;
- clock-names = "iHCLK";
- socionext,use-rtm;
- socionext,set-aces;
- };