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author | Dinh Nguyen <dinguyen@kernel.org> | 2021-02-12 08:30:58 -0600 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2021-02-12 13:04:58 -0800 |
commit | 2bea59d3888bbf1eeee29b8beddb264df4f97ff7 (patch) | |
tree | 5c0639211ba76a1a435e4a5da74fa70901ba1e65 /Documentation | |
parent | 5c8fe583cce542aa0b84adc939ce85293de36e5e (diff) | |
download | linux-2bea59d3888bbf1eeee29b8beddb264df4f97ff7.tar.bz2 |
dt-bindings: documentation: add clock bindings information for eASIC N5X
Document the Agilex clock bindings, and add the clock header file. The
clock header is an enumeration of all the different clocks on the eASIC
N5X platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20210212143059.478554-1-dinguyen@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml b/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml new file mode 100644 index 000000000000..8f45976e946e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/intel,easic-n5x.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel SoCFPGA eASIC N5X platform clock controller binding + +maintainers: + - Dinh Nguyen <dinguyen@kernel.org> + +description: + The Intel eASIC N5X Clock controller is an integrated clock controller, which + generates and supplies to all modules. + +properties: + compatible: + const: intel,easic-n5x-clkmgr + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - '#clock-cells' + +additionalProperties: false + +examples: + # Clock controller node: + - | + clkmgr: clock-controller@ffd10000 { + compatible = "intel,easic-n5x-clkmgr"; + reg = <0xffd10000 0x1000>; + clocks = <&osc1>; + #clock-cells = <1>; + }; +... |