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authorBenjamin Gaignard <benjamin.gaignard@st.com>2019-12-17 10:21:58 +0100
committerRob Herring <robh@kernel.org>2019-12-17 18:01:42 -0600
commit0b7c446fa9f72fe14fd87154d9e183baa958c979 (patch)
tree227aee21f25d4cac86b057792bd07576301e3af3 /Documentation
parent71021f3fd3af00482d55e4c62a23cc6148f6347d (diff)
downloadlinux-0b7c446fa9f72fe14fd87154d9e183baa958c979.tar.bz2
dt-bindings: dma: Convert stm32 DMAMUX bindings to json-schema
Convert the STM32 DMAMUX binding to DT schema format using json-schema Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml52
-rw-r--r--Documentation/devicetree/bindings/dma/stm32-dmamux.txt84
2 files changed, 52 insertions, 84 deletions
diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml
new file mode 100644
index 000000000000..915bc4af9568
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml
@@ -0,0 +1,52 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
+
+maintainers:
+ - Amelie Delaunay <amelie.delaunay@st.com>
+
+allOf:
+ - $ref: "dma-router.yaml#"
+
+properties:
+ "#dma-cells":
+ const: 3
+
+ compatible:
+ const: st,stm32h7-dmamux
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - dma-masters
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ #include <dt-bindings/reset/stm32mp1-resets.h>
+ dma-router@40020800 {
+ compatible = "st,stm32h7-dmamux";
+ reg = <0x40020800 0x3c>;
+ #dma-cells = <3>;
+ dma-requests = <128>;
+ dma-channels = <16>;
+ dma-masters = <&dma1 &dma2>;
+ clocks = <&timer_clk>;
+ };
+
+...
+
diff --git a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt b/Documentation/devicetree/bindings/dma/stm32-dmamux.txt
deleted file mode 100644
index 1b893b235507..000000000000
--- a/Documentation/devicetree/bindings/dma/stm32-dmamux.txt
+++ /dev/null
@@ -1,84 +0,0 @@
-STM32 DMA MUX (DMA request router)
-
-Required properties:
-- compatible: "st,stm32h7-dmamux"
-- reg: Memory map for accessing module
-- #dma-cells: Should be set to <3>.
- First parameter is request line number.
- Second is DMA channel configuration
- Third is Fifo threshold
- For more details about the three cells, please see
- stm32-dma.txt documentation binding file
-- dma-masters: Phandle pointing to the DMA controllers.
- Several controllers are allowed. Only "st,stm32-dma" DMA
- compatible are supported.
-
-Optional properties:
-- dma-channels : Number of DMA requests supported.
-- dma-requests : Number of DMAMUX requests supported.
-- resets: Reference to a reset controller asserting the DMA controller
-- clocks: Input clock of the DMAMUX instance.
-
-Example:
-
-/* DMA controller 1 */
-dma1: dma-controller@40020000 {
- compatible = "st,stm32-dma";
- reg = <0x40020000 0x400>;
- interrupts = <11>,
- <12>,
- <13>,
- <14>,
- <15>,
- <16>,
- <17>,
- <47>;
- clocks = <&timer_clk>;
- #dma-cells = <4>;
- st,mem2mem;
- resets = <&rcc 150>;
- dma-channels = <8>;
- dma-requests = <8>;
-};
-
-/* DMA controller 1 */
-dma2: dma@40020400 {
- compatible = "st,stm32-dma";
- reg = <0x40020400 0x400>;
- interrupts = <56>,
- <57>,
- <58>,
- <59>,
- <60>,
- <68>,
- <69>,
- <70>;
- clocks = <&timer_clk>;
- #dma-cells = <4>;
- st,mem2mem;
- resets = <&rcc 150>;
- dma-channels = <8>;
- dma-requests = <8>;
-};
-
-/* DMA mux */
-dmamux1: dma-router@40020800 {
- compatible = "st,stm32h7-dmamux";
- reg = <0x40020800 0x3c>;
- #dma-cells = <3>;
- dma-requests = <128>;
- dma-channels = <16>;
- dma-masters = <&dma1 &dma2>;
- clocks = <&timer_clk>;
-};
-
-/* DMA client */
-usart1: serial@40011000 {
- compatible = "st,stm32-usart", "st,stm32-uart";
- reg = <0x40011000 0x400>;
- interrupts = <37>;
- clocks = <&timer_clk>;
- dmas = <&dmamux1 41 0x414 0>,
- <&dmamux1 42 0x414 0>;
- dma-names = "rx", "tx";
-};