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author | Huacai Chen <chenhuacai@loongson.cn> | 2022-05-31 18:04:10 +0800 |
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committer | Huacai Chen <chenhuacai@loongson.cn> | 2022-06-03 20:09:27 +0800 |
commit | f23b22599f8ec09460077418bca1e331bb715f63 (patch) | |
tree | b4ae65efec342edb602ae27ee82f81e3c68af271 /Documentation/translations/zh_CN/loongarch/index.rst | |
parent | 0ea8ce61cb2c487e818c515f91329fa9972a7155 (diff) | |
download | linux-f23b22599f8ec09460077418bca1e331bb715f63.tar.bz2 |
Documentation/zh_CN: Add basic LoongArch documentations
Add some basic documentation (zh_CN version) for LoongArch. LoongArch is
a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a
reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a
64-bit version (LA64).
Reviewed-by: Alex Shi <alexs@kernel.org>
Reviewed-by: Yanteng Si <siyanteng@loongson.cn>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'Documentation/translations/zh_CN/loongarch/index.rst')
-rw-r--r-- | Documentation/translations/zh_CN/loongarch/index.rst | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/Documentation/translations/zh_CN/loongarch/index.rst b/Documentation/translations/zh_CN/loongarch/index.rst new file mode 100644 index 000000000000..7d23eb78379d --- /dev/null +++ b/Documentation/translations/zh_CN/loongarch/index.rst @@ -0,0 +1,26 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: ../disclaimer-zh_CN.rst + +:Original: Documentation/loongarch/index.rst +:Translator: Huacai Chen <chenhuacai@loongson.cn> + +================= +LoongArch体系结构 +================= + +.. toctree:: + :maxdepth: 2 + :numbered: + + introduction + irq-chip-model + + features + +.. only:: subproject and html + + Indices + ======= + + * :ref:`genindex` |