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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-09-14 11:55:40 +0300 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2015-09-25 07:54:05 +0530 |
| commit | 2e9b55becc905207eb01e24bc282f8062cc497b5 (patch) | |
| tree | da693a187714cc6e229d64159ead64bded09842c /Documentation/serial | |
| parent | 581ec089a5476a9ddc8d0707e47315a2609297ad (diff) | |
| download | linux-2e9b55becc905207eb01e24bc282f8062cc497b5.tar.bz2 | |
dmaengine: idma64: make better performance on pause / resume
Accordingly to the documentation the CH_DRAIN bit enforses single bursts when
channel is going to be suspended. This, in case when channel will be resumed,
makes data to flow in non-optimal mode until DMA returns to full burst mode.
The fix differentiates pause / resume cycle from pause / terminate and sets
CH_DRAIN bit accordingly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'Documentation/serial')
0 files changed, 0 insertions, 0 deletions