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authorLinus Torvalds <torvalds@linux-foundation.org>2019-09-17 16:22:26 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2019-09-17 16:22:26 -0700
commit7c672abc120a55f678e5571ae2ee93f06ca4d7f9 (patch)
tree7beebc09f9626ca8d5f7df4dded0a553de479323 /Documentation/riscv
parent1902314157b19754e0ff25b44527654847cfd127 (diff)
parentfe013f8bc160d79c6e33bb66d9bb0cd24949274c (diff)
downloadlinux-7c672abc120a55f678e5571ae2ee93f06ca4d7f9.tar.bz2
Merge tag 'docs-5.4' of git://git.lwn.net/linux
Pull documentation updates from Jonathan Corbet: "It's a somewhat calmer cycle for docs this time, as the churn of the mass RST conversion is happily mostly behind us. - A new document on reproducible builds. - We finally got around to zapping the documentation for hardware support that was removed in 2004; one doesn't want to rush these things. - The usual assortment of fixes, typo corrections, etc" * tag 'docs-5.4' of git://git.lwn.net/linux: (67 commits) Documentation: kbuild: Add document about reproducible builds docs: printk-formats: Stop encouraging use of unnecessary %h[xudi] and %hh[xudi] Documentation: Add "earlycon=sbi" to the admin guide doc:lock: remove reference to clever use of read-write lock devices.txt: improve entry for comedi (char major 98) docs: mtd: Update spi nor reference driver doc: arm64: fix grammar dtb placed in no attributes region Documentation: sysrq: don't recommend 'S' 'U' before 'B' mailmap: Update email address for Quentin Perret docs: ftrace: clarify when tracing is disabled by the trace file docs: process: fix broken link Documentation/arm/samsung-s3c24xx: Remove stray U+FEFF character to fix title Documentation/arm/sa1100/assabet: Fix 'make assabet_defconfig' command Documentation/arm/sa1100: Remove some obsolete documentation docs/zh_CN: update Chinese howto.rst for latexdocs making Documentation: virt: Fix broken reference to virt tree's index docs: Fix typo on pull requests guide kernel-doc: Allow anonymous enum Documentation: sphinx: Don't parse socket() as identifier reference Documentation: sphinx: Add missing comma to list of strings ...
Diffstat (limited to 'Documentation/riscv')
-rw-r--r--Documentation/riscv/boot-image-header.rst (renamed from Documentation/riscv/boot-image-header.txt)39
-rw-r--r--Documentation/riscv/index.rst1
2 files changed, 26 insertions, 14 deletions
diff --git a/Documentation/riscv/boot-image-header.txt b/Documentation/riscv/boot-image-header.rst
index 14b1492f689b..7b4d1d747585 100644
--- a/Documentation/riscv/boot-image-header.txt
+++ b/Documentation/riscv/boot-image-header.rst
@@ -1,22 +1,25 @@
- Boot image header in RISC-V Linux
- =============================================
+=================================
+Boot image header in RISC-V Linux
+=================================
-Author: Atish Patra <atish.patra@wdc.com>
-Date : 20 May 2019
+:Author: Atish Patra <atish.patra@wdc.com>
+:Date: 20 May 2019
This document only describes the boot image header details for RISC-V Linux.
-The complete booting guide will be available at Documentation/riscv/booting.txt.
-The following 64-byte header is present in decompressed Linux kernel image.
+TODO:
+ Write a complete booting guide.
+
+The following 64-byte header is present in decompressed Linux kernel image::
u32 code0; /* Executable code */
- u32 code1; /* Executable code */
+ u32 code1; /* Executable code */
u64 text_offset; /* Image load offset, little endian */
u64 image_size; /* Effective Image size, little endian */
u64 flags; /* kernel flags, little endian */
u32 version; /* Version of this header */
- u32 res1 = 0; /* Reserved */
- u64 res2 = 0; /* Reserved */
+ u32 res1 = 0; /* Reserved */
+ u64 res2 = 0; /* Reserved */
u64 magic = 0x5643534952; /* Magic number, little endian, "RISCV" */
u32 magic2 = 0x56534905; /* Magic number 2, little endian, "RSC\x05" */
u32 res4; /* Reserved for PE COFF offset */
@@ -25,16 +28,21 @@ This header format is compliant with PE/COFF header and largely inspired from
ARM64 header. Thus, both ARM64 & RISC-V header can be combined into one common
header in future.
-Notes:
+Notes
+=====
+
- This header can also be reused to support EFI stub for RISC-V in future. EFI
specification needs PE/COFF image header in the beginning of the kernel image
in order to load it as an EFI application. In order to support EFI stub,
code0 should be replaced with "MZ" magic string and res5(at offset 0x3c) should
point to the rest of the PE/COFF header.
-- version field indicate header version number.
- Bits 0:15 - Minor version
- Bits 16:31 - Major version
+- version field indicate header version number
+
+ ========== =============
+ Bits 0:15 Minor version
+ Bits 16:31 Major version
+ ========== =============
This preserves compatibility across newer and older version of the header.
The current version is defined as 0.2.
@@ -45,7 +53,10 @@ Notes:
The "magic2" field replaces it, matching up with the ARM64 header.
- In current header, the flags field has only one field.
- Bit 0: Kernel endianness. 1 if BE, 0 if LE.
+
+ ===== ====================================
+ Bit 0 Kernel endianness. 1 if BE, 0 if LE.
+ ===== ====================================
- Image size is mandatory for boot loader to load kernel image. Booting will
fail otherwise.
diff --git a/Documentation/riscv/index.rst b/Documentation/riscv/index.rst
index e3ca0922a8c2..215fd3c1f2d5 100644
--- a/Documentation/riscv/index.rst
+++ b/Documentation/riscv/index.rst
@@ -5,6 +5,7 @@ RISC-V architecture
.. toctree::
:maxdepth: 1
+ boot-image-header
pmu
.. only:: subproject and html