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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-01-19 18:39:45 +0200 |
|---|---|---|
| committer | Darren Hart <dvhart@linux.intel.com> | 2017-02-04 02:47:23 +0100 |
| commit | 553e9c1861b7f91492eb6e209adff81507624fa6 (patch) | |
| tree | 18f4b811d8a098374d76a51acd06fdd28c47b025 /Documentation/rbtree.txt | |
| parent | 4b819c6d5f3c9f9efb8ab334f735f6a223e84d14 (diff) | |
| download | linux-553e9c1861b7f91492eb6e209adff81507624fa6.tar.bz2 | |
platform/x86: intel_mid_powerbtn: Acknowledge interrupts
Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'Documentation/rbtree.txt')
0 files changed, 0 insertions, 0 deletions