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authorMateusz Jończyk <mat.jonczyk@o2.pl>2022-02-25 22:50:09 +0100
committerAlexandre Belloni <alexandre.belloni@bootlin.com>2022-06-24 21:23:50 +0200
commitd2a632a8a11756197deb1341bbb09c09abaf20ce (patch)
tree2ad9fa01cb1caaf271566709dcf8cd795babbd25 /Documentation/openrisc
parentf2906aa863381afb0015a9eb7fefad885d4e5a56 (diff)
downloadlinux-d2a632a8a11756197deb1341bbb09c09abaf20ce.tar.bz2
rtc: mc146818-lib: reduce RTC_UIP polling period
Waiting 1ms every time is not necessary, for example on some AMD boxes the RTC_UIP bit is documented as being high for around 270 microseconds in some cases [1], which agreed with experiments on an SB710 southbridge. So 100us seems optimal. This in preparation for mach_get_cmos_time() refactoring. The functions mc146818_get_time() and mach_get_cmos_time() in arch/x86/kernel/rtc.c perform the same function and the code is duplicated. mach_get_cmos_time() is busy waiting for the RTC_UIP bit to clear, so make mc146818_get_time() more similar to it by reducing the polling period. [1] AMD SB700/710/750 Register Reference Guide, page 307, https://developer.amd.com/wordpress/media/2012/10/43009_sb7xx_rrg_pub_1.00.pdf "SB700 A12: The UIP high pulse is 270 μS Typical when SS on SRC clock is OFF and 100μ min when SRC SS is ON." [sic] Signed-off-by: Mateusz Jończyk <mat.jonczyk@o2.pl> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: x86@kernel.org Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20220225215011.861477-2-mat.jonczyk@o2.pl
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