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author | Frank Min <Frank.Min@amd.com> | 2016-04-27 20:02:57 +0800 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2016-10-25 14:38:22 -0400 |
commit | f501a7e550015bc3170c24d18ba1a008e38bddbf (patch) | |
tree | 15edfc7256a355c2df7a093b4d381616e3fa290a /Documentation/ja_JP | |
parent | 01ab960d49cdc8d7fbfa5a6f2b717f491927a776 (diff) | |
download | linux-f501a7e550015bc3170c24d18ba1a008e38bddbf.tar.bz2 |
drm/amdgpu:fw bo should be in VRAM for SRIOV
for GTT memory SMC can only access it within PF space, which is not
used for SRIOV case, thus for SRIOV case, we let SMC use FB space for
ucode bo.
Signed-off-by: Frank Min <frank.min@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'Documentation/ja_JP')
0 files changed, 0 insertions, 0 deletions