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authorChris Brandt <chris.brandt@renesas.com>2017-03-29 10:30:30 -0700
committerAlexandre Belloni <alexandre.belloni@free-electrons.com>2017-04-03 18:01:41 +0200
commit04767b9fc2315c90a1e4bfdee883c0cbc122f30f (patch)
tree2ea15534d54439e6a7cf960915427240468b7bff /Documentation/devicetree/bindings/rtc
parentdab5aec64bf5907f65926675807e4ebe83b3b10e (diff)
downloadlinux-04767b9fc2315c90a1e4bfdee883c0cbc122f30f.tar.bz2
dt-bindings: rtc: document the rtc-sh bindings
Add the binding documentation for rtc-sh which is an RTC for SuperH and RZ/A SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'Documentation/devicetree/bindings/rtc')
-rw-r--r--Documentation/devicetree/bindings/rtc/rtc-sh.txt28
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diff --git a/Documentation/devicetree/bindings/rtc/rtc-sh.txt b/Documentation/devicetree/bindings/rtc/rtc-sh.txt
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+* Real Time Clock for Renesas SH and ARM SoCs
+
+Required properties:
+- compatible: Should be "renesas,r7s72100-rtc" and "renesas,sh-rtc" as a
+ fallback.
+- reg: physical base address and length of memory mapped region.
+- interrupts: 3 interrupts for alarm, period, and carry.
+- interrupt-names: The interrupts should be labeled as "alarm", "period", and
+ "carry".
+- clocks: The functional clock source for the RTC controller must be listed
+ first (if exists). Additionally, potential clock counting sources are to be
+ listed.
+- clock-names: The functional clock must be labeled as "fck". Other clocks
+ may be named in accordance to the SoC hardware manuals.
+
+
+Example:
+rtc: rtc@fcff1000 {
+ compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
+ reg = <0xfcff1000 0x2e>;
+ interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 277 IRQ_TYPE_EDGE_RISING
+ GIC_SPI 278 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "alarm", "period", "carry";
+ clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>,
+ <&rtc_x3_clk>, <&extal_clk>;
+ clock-names = "fck", "rtc_x1", "rtc_x3", "extal";
+};